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DTSTAMP:20231208T174716Z
UID:50293780-71F4-43E1-A283-453C8001F9A2
DTSTART;TZID=America/New_York:20230516T120000
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DESCRIPTION:Abstract:\n\nChiplet-based integration is a paradigm shift that
  shapes the way we design our future systems. The concept is to move forwa
 rd from large systems-on-chip that are limited by communication\, thermal 
 design power\, and reticle size\, toward a robust plug-and-play approach\,
  where small\, hardened IP heterogeneous off-the-shelf chiplets are seamle
 ssly integrated on a single platform. In this talk\, we will discuss the c
 urrent state-of-the-art and challenges in chiplet integration\, and specif
 ically examine an ultra-large wafer-scale platform for applications\, such
  as artificial intelligence acceleration\, high-performance computing\, an
 d neuromorphic hardware.\n\nSpeaker(s): Boris Vaisband \n\nRoom: 3142\, Bl
 dg: EIT\, 200 University Ave W\, Waterloo\, Ontario\, Canada\, ON N2L 3G1
LOCATION:Room: 3142\, Bldg: EIT\, 200 University Ave W\, Waterloo\, Ontario
 \, Canada\, ON N2L 3G1
ORGANIZER:ppgavirneni@uwaterloo.ca
SEQUENCE:28
SUMMARY:Chiplet-Based Heterogeneous Integration
URL;VALUE=URI:https://events.vtools.ieee.org/m/389313
X-ALT-DESC:Description: <br /><p><span style="font-family: 'times new roman
 '\, times\, serif\; font-size: 14pt\;"><strong>Abstract:</strong></span></
 p>\n<p><span style="font-family: 'times new roman'\, times\, serif\; font-
 size: 14pt\;">Chiplet-based integration is a paradigm shift that shapes th
 e way we design our future systems. The concept is to move forward from la
 rge systems-on-chip that are limited by communication\, thermal design pow
 er\, and reticle size\, toward a robust plug-and-play approach\, where sma
 ll\, hardened IP heterogeneous off-the-shelf chiplets are seamlessly integ
 rated on a single platform. In this talk\, we will discuss the current sta
 te-of-the-art and challenges in chiplet integration\, and specifically exa
 mine an ultra-large wafer-scale platform for applications\, such as artifi
 cial intelligence acceleration\, high-performance computing\, and neuromor
 phic hardware.</span></p>
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