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DTSTAMP:20240312T144832Z
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DTSTART;TZID=America/New_York:20240126T120000
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DESCRIPTION:In recent years\, the field of advanced packaging has taken cen
 ter stage as the semiconductor industry pursues ever more energy efficient
 \, high-performance\, and low-cost electronic systems. While the field of 
 advanced packaging is undergoing revolutionary technology advances today\,
  there is little doubt that advanced packaging in the new era of Moore’s
  Law will offer extreme levels of die integration/bonding and begin to blu
 r the boundary between on- and off-chip connectivity (especially in 3D arc
 hitectures) due to ever denser physical I/O interfaces/bonds. This talk wi
 ll address a few technical areas. First\, we present a survey of recent ad
 vanced packaging technologies. Next\, we discuss the emergence of panel-ba
 sed glass-core packages and their potential impact on AI workloads. Furthe
 r\, we present a deep dive into GT’s glass-core packaging technologies\,
  including large-area glass packages and glass-based stitch-chip technolog
 ies for digital and mm-wave electronics. Next\, 3D technologies enabled by
  SiO2-based chiplet wafer-level reconstitution technologies for dense 3DHI
  technologies and selective-ALD cobalt chiplet bonding are also discussed.
 \n\nSpeaker(s): Muhannad Bakir\, \n\nVirtual: https://events.vtools.ieee.o
 rg/m/400217
LOCATION:Virtual: https://events.vtools.ieee.org/m/400217
ORGANIZER:p.wesling@ieee.org
SEQUENCE:17
SUMMARY:Heterogeneous Integration Innovations Enabled by Glass-Core Packagi
 ng and 3D Technologies
URL;VALUE=URI:https://events.vtools.ieee.org/m/400217
X-ALT-DESC:Description: <br /><p>In recent years\, the field of advanced pa
 ckaging has taken center stage as the semiconductor industry pursues ever 
 more energy efficient\, high-performance\, and low-cost electronic systems
 . While the field of advanced packaging is undergoing revolutionary techno
 logy advances today\, there is little doubt that advanced packaging in the
  new era of Moore&rsquo\;s Law will offer extreme levels of die integratio
 n/bonding and begin to blur the boundary between on- and off-chip connecti
 vity (especially in 3D architectures) due to ever denser physical I/O inte
 rfaces/bonds. This talk will address a few technical areas. First\, we pre
 sent a survey of recent advanced packaging technologies. Next\, we discuss
  the emergence of panel-based glass-core packages and their potential impa
 ct on AI workloads. Further\, we present a deep dive into GT&rsquo\;s glas
 s-core packaging technologies\, including large-area glass packages and gl
 ass-based stitch-chip technologies for digital and mm-wave electronics.&nb
 sp\;Next\, 3D technologies enabled by SiO<sub>2</sub>-based chiplet wafer-
 level reconstitution technologies for dense 3DHI technologies and selectiv
 e-ALD cobalt chiplet bonding are also discussed.</p>
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