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DTSTART:20240310T030000
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DTSTAMP:20240315T151055Z
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DTSTART;TZID=America/Indiana/Indianapolis:20240305T120000
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DESCRIPTION:Silicon photonics are the semiconductor integration of EIC and 
 PIC on a silicon substrate (wafer) with complementary metal-oxide semicond
 uctor (CMOS) technology. On the other hand\, co-packaged optics (CPO) are 
 heterogeneous integration packaging methods to integrate the optical engin
 e (OE) which consists of photonic ICs (PIC) and the electrical engine (EE)
  which consists of the electronic ICs (EIC) as well as the switch ASIC (ap
 plication specific IC). The advantages of CPO are: (a) to reduce the lengt
 h of the electrical interface between the OE/EE (or PIC/EIC) and the ASIC\
 , (b) to reduce the energy required to drive the signal\, and (c) to cut t
 he latency which leads to better electrical performance. In the next few y
 ears\, we will see more implementations of a higher level of heterogeneous
  integration of PIC and EIC\, whether it is for performance\, form factor\
 , power consumption or cost. The content of this lecture is shown below.\n
 \nSpeaker(s): Dr. John H. Lau\, \n\nBldg: Birck Nano Technology Center\, B
 RK 1001\, 1205 W State St\, West Lafayette\, Indiana\, United States\, 479
 07\, Virtual: https://events.vtools.ieee.org/m/407841
LOCATION:Bldg: Birck Nano Technology Center\, BRK 1001\, 1205 W State St\, 
 West Lafayette\, Indiana\, United States\, 47907\, Virtual: https://events
 .vtools.ieee.org/m/407841
ORGANIZER:manohar.bongarala@nokia-bell-labs.com
SEQUENCE:19
SUMMARY:Co-Packaged Optics - Heterogeneous Integration of Photonic IC and E
 lectronic IC
URL;VALUE=URI:https://events.vtools.ieee.org/m/407841
X-ALT-DESC:Description: <br /><p>Silicon photonics are the semiconductor in
 tegration of EIC and PIC on a silicon substrate (wafer) with complementary
  metal-oxide semiconductor (CMOS) technology. On the other hand\, co-packa
 ged optics (CPO) are heterogeneous integration packaging methods to integr
 ate the optical engine (OE) which consists of photonic ICs (PIC) and the e
 lectrical engine (EE) which consists of the electronic ICs (EIC) as well a
 s the switch ASIC (application specific IC). The advantages of CPO are: (a
 ) to reduce the length of the electrical interface between the OE/EE (or P
 IC/EIC) and the ASIC\, (b) to reduce the energy required to drive the sign
 al\, and (c) to cut the latency which leads to better electrical performan
 ce. In the next few years\, we will see more implementations of a higher l
 evel of heterogeneous integration of PIC and EIC\, whether it is for perfo
 rmance\, form factor\, power consumption or cost. The content of this lect
 ure is shown below.<br><br><br><br></p>
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