BEGIN:VCALENDAR
VERSION:2.0
PRODID:IEEE vTools.Events//EN
CALSCALE:GREGORIAN
BEGIN:VTIMEZONE
TZID:America/New_York
BEGIN:DAYLIGHT
DTSTART:20240310T030000
TZOFFSETFROM:-0500
TZOFFSETTO:-0400
RRULE:FREQ=YEARLY;BYDAY=2SU;BYMONTH=3
TZNAME:EDT
END:DAYLIGHT
BEGIN:STANDARD
DTSTART:20241103T010000
TZOFFSETFROM:-0400
TZOFFSETTO:-0500
RRULE:FREQ=YEARLY;BYDAY=1SU;BYMONTH=11
TZNAME:EST
END:STANDARD
END:VTIMEZONE
BEGIN:VEVENT
DTSTAMP:20240423T011815Z
UID:427FFCF0-01A7-4EEF-ABAA-0D94D4E2149D
DTSTART;TZID=America/New_York:20240419T080000
DTEND;TZID=America/New_York:20240419T163000
DESCRIPTION:The combined 17th Central Pennsylvania Symposium on Signal and 
 Power Integrity and MASH Forum is targeted to the local and national conne
 ctor industries. This year we have added a Mid Atlantic Semiconductor Hub 
 (MASH) forum that deals with bringing the semiconductor industry back to t
 he USA. MASH is funded through the CHIPS act.\n\nParticipants will have th
 e opportunity to learn from international experts about the latest develop
 ments in signal integrity and semiconductor and have the opportunity to ex
 change ideas with them\, as well as other professionals and business leade
 rs.\n\nFor more details on the talks/speakers please visithttps://harrisbu
 rg.psu.edu/center-for-signal-integrity/symposium\n\nCo-sponsored by: Penn 
 State Harrisburg\n\nSpeaker(s): Tom Coughlin\, Dr. Daniel Lopez\n\nAgenda:
  \n17th Central PA Symposium on Signal Integrity and MASH Forum\n\n8:00 to
  8:30\n\nRegistration\n\n8:30 to 9:30\n\nWelcoming Remarks\n\nPlenary Spea
 ker\n\nGlobal Semiconductor Future Trends\n\nTom Coughlin\, IEEE President
 \n\n9:40 to 10:40\n\nWorkshop 1\n\nTim Lee\, SI Scientist Keysight\n\nNavi
 gating SI Challenges: From traditional PCBs to Chiplets\n\nWorkshop 2\n\nM
 ASH Workforce Promoting a World-Class Workforce in the Semiconductor Indus
 try\n\nDr. Mark Threeton\, Penn State\n\n10:45 to 11:45\n\nThe Mid-Atlanti
 c Semiconductor Hub\n\nDr. Daniel Lopez\, Penn State\n\n11:45 to 12:15\n\n
 Lunch\n\n12:15 to 1:15\n\nLow-Cost SI Solutions for Every Engineer\n\nDr. 
 E. Bogatin\, University of Colorado\n\n1:20 to 2:20\n\nISI Across HVM beyo
 nd 32G\n\nJuan Martinez\, AMD SI Engineer\n\n2:25 to 3:25\n\nSignal Integr
 ity meets Forward Error Correction\n\nHoward Heck\, Intel Senior SI Engine
 er\n\n3:30 to 4:30\n\nWorkshop 3\n\nA novel VNA based utility to create N 
 port S-parameter matrixes\n\nE. Oseassen\, Rohde &amp; Schwarz\n\nWorkshop 4\n
 \nSignal Integrity Applications in Intelligent Connectivity Systems\n\nW. 
 Smith\, Ansys\n\nRoom: 210\, Bldg: Capital Union Building\, 777 West Harri
 sburg Pike\, Middletown\, Middletown\, Pennsylvania\, United States\, 1705
 7-4898
LOCATION:Room: 210\, Bldg: Capital Union Building\, 777 West Harrisburg Pik
 e\, Middletown\, Middletown\, Pennsylvania\, United States\, 17057-4898
ORGANIZER:awm2@psu.edu
SEQUENCE:57
SUMMARY:Combined 17th Central Pennsylvania Symposium on Signal and Power In
 tegrity and MASH Forum 
URL;VALUE=URI:https://events.vtools.ieee.org/m/410664
X-ALT-DESC:Description: &lt;br /&gt;&lt;p&gt;The combined 17th Central Pennsylvania Sym
 posium on Signal and Power Integrity and MASH Forum is targeted to the loc
 al and national connector industries. This year we have added a Mid Atlant
 ic Semiconductor Hub (MASH) forum that deals with bringing the semiconduct
 or industry back to the USA. MASH is funded through the CHIPS act.&lt;/p&gt;\n&lt;p
 &gt;Participants will have the opportunity to learn from international expert
 s about the latest developments in signal integrity and semiconductor and 
 have the opportunity to exchange ideas with them\, as well as other profes
 sionals and business leaders.&lt;br aria-hidden=&quot;true&quot;&gt;&lt;br&gt;&lt;/p&gt;\n&lt;p&gt;&lt;strong&gt;F
 or more details on the talks/speakers please visit&lt;a href=&quot;https://harrisb
 urg.psu.edu/center-for-signal-integrity/symposium&quot;&gt; https://harrisburg.psu
 .edu/center-for-signal-integrity/symposium&lt;/a&gt;&lt;/strong&gt;&lt;/p&gt;&lt;br /&gt;&lt;br /&gt;Age
 nda: &lt;br /&gt;&lt;table style=&quot;height: 1248.44px\;&quot; width=&quot;791&quot;&gt;\n&lt;tbody&gt;\n&lt;tr s
 tyle=&quot;height: 60.4625px\;&quot;&gt;\n&lt;td style=&quot;width: 759px\; height: 60.4625px\;
 &quot; colspan=&quot;3&quot; width=&quot;98%&quot;&gt;\n&lt;p style=&quot;text-align: center\;&quot;&gt;&lt;strong&gt; 17&lt;su
 p&gt;th&lt;/sup&gt; Central PA Symposium on Signal Integrity and MASH Forum&lt;/strong
 &gt;&lt;/p&gt;\n&lt;/td&gt;\n&lt;/tr&gt;\n&lt;tr style=&quot;height: 76.75px\;&quot;&gt;\n&lt;td style=&quot;width: 105
 .225px\; height: 76.75px\;&quot; width=&quot;16%&quot;&gt;\n&lt;p&gt;8:00 to 8:30&amp;nbsp\;&lt;/p&gt;\n&lt;/td
 &gt;\n&lt;td style=&quot;width: 653.775px\; height: 76.75px\;&quot; colspan=&quot;2&quot; width=&quot;82%
 &quot;&gt;\n&lt;p&gt;&lt;strong&gt;Registration&lt;/strong&gt;&lt;/p&gt;\n&lt;/td&gt;\n&lt;/tr&gt;\n&lt;tr style=&quot;height:
  207.887px\;&quot;&gt;\n&lt;td style=&quot;width: 105.225px\; height: 207.887px\;&quot; width=&quot;
 16%&quot;&gt;\n&lt;p&gt;8:30 to 9:30&amp;nbsp\;&lt;/p&gt;\n&lt;p&gt;&amp;nbsp\;&lt;/p&gt;\n&lt;p&gt;&amp;nbsp\;&lt;/p&gt;\n&lt;p&gt;&amp;nbs
 p\;&lt;/p&gt;\n&lt;/td&gt;\n&lt;td style=&quot;width: 653.775px\; height: 207.887px\;&quot; colspan
 =&quot;2&quot; width=&quot;82%&quot;&gt;\n&lt;p&gt;&lt;strong&gt;Welcoming Remarks&lt;/strong&gt;&lt;/p&gt;\n&lt;p&gt;&lt;strong&gt;P
 lenary Speaker&amp;nbsp\;&lt;/strong&gt;&lt;/p&gt;\n&lt;p class=&quot;MsoNormal&quot; style=&quot;mso-margin
 -top-alt: auto\; mso-margin-bottom-alt: auto\; line-height: normal\;&quot;&gt;&lt;str
 ong&gt;&lt;span style=&quot;font-size: 12.0pt\; font-family: &#39;Aptos&#39;\,sans-serif\; ms
 o-fareast-font-family: &#39;Times New Roman&#39;\; mso-bidi-font-family: Calibri\;
  mso-bidi-theme-font: minor-latin\;&quot;&gt;Global Semiconductor Future Trends&lt;/s
 pan&gt;&lt;/strong&gt;&lt;/p&gt;\n&lt;p&gt;&lt;span style=&quot;font-family: &#39;Aptos&#39;\,sans-serif\; colo
 r: #2b2e34\; background: white\;&quot;&gt;Tom Coughlin\, IEEE President&amp;nbsp\;&lt;/sp
 an&gt;&lt;/p&gt;\n&lt;/td&gt;\n&lt;/tr&gt;\n&lt;tr style=&quot;height: 182.363px\;&quot;&gt;\n&lt;td style=&quot;width:
  105.225px\; padding: 3pt\; height: 182.363px\;&quot; valign=&quot;top&quot; width=&quot;15%&quot;&gt;
 \n&lt;p class=&quot;MsoNormal&quot; style=&quot;mso-margin-top-alt: auto\; mso-margin-bottom
 -alt: auto\; line-height: normal\;&quot;&gt;&lt;span style=&quot;font-size: 12.0pt\; font-
 family: &#39;Times New Roman&#39;\,serif\; mso-fareast-font-family: &#39;Times New Rom
 an&#39;\; color: black\; mso-color-alt: windowtext\;&quot;&gt;9:40 to 10:40&lt;/span&gt;&lt;/p&gt;
 \n&lt;/td&gt;\n&lt;td style=&quot;width: 325.038px\; padding: 3pt\; height: 182.363px\;&quot;
  valign=&quot;top&quot; width=&quot;41%&quot;&gt;\n&lt;p&gt;&lt;strong&gt;&lt;span style=&quot;font-family: &#39;Aptos&#39;\,
 sans-serif\; mso-bidi-font-family: Calibri\; color: #111111\; border: none
  windowtext 1.0pt\; mso-border-alt: none windowtext 0in\; padding: 0in\;&quot;&gt;
 Workshop 1&lt;/span&gt;&lt;/strong&gt;&lt;/p&gt;\n&lt;p class=&quot;MsoNormal&quot; style=&quot;mso-margin-top
 -alt: auto\; mso-margin-bottom-alt: auto\; line-height: normal\;&quot;&gt;&lt;span st
 yle=&quot;font-size: 12.0pt\; font-family: &#39;Aptos&#39;\,sans-serif\; mso-fareast-fo
 nt-family: &#39;Times New Roman&#39;\; mso-bidi-font-family: Calibri\; color: #111
 111\; border: none windowtext 1.0pt\; mso-border-alt: none windowtext 0in\
 ; padding: 0in\;&quot;&gt;Tim Lee\,&amp;nbsp\;&lt;/span&gt;&lt;span style=&quot;font-size: 12.0pt\; 
 font-family: &#39;Aptos&#39;\,sans-serif\; mso-bidi-font-family: Calibri\; color: 
 #111111\; border: none windowtext 1.0pt\; mso-border-alt: none windowtext 
 0in\; padding: 0in\;&quot;&gt;SI&amp;nbsp\; Scientist &lt;/span&gt;&lt;span style=&quot;font-size: 1
 2.0pt\; font-family: &#39;Aptos&#39;\,sans-serif\; mso-fareast-font-family: &#39;Times
  New Roman&#39;\; mso-bidi-font-family: Calibri\; color: #111111\; border: non
 e windowtext 1.0pt\; mso-border-alt: none windowtext 0in\; padding: 0in\;&quot;
 &gt;Keysight&lt;/span&gt;&lt;/p&gt;\n&lt;p class=&quot;MsoNormal&quot; style=&quot;mso-margin-top-alt: auto
 \; mso-margin-bottom-alt: auto\; line-height: normal\;&quot;&gt;&lt;span style=&quot;font-
 size: 12.0pt\; font-family: &#39;Aptos&#39;\,sans-serif\; mso-fareast-font-family:
  &#39;Times New Roman&#39;\; mso-bidi-font-family: Calibri\; color: #111111\; bord
 er: none windowtext 1.0pt\; mso-border-alt: none windowtext 0in\; padding:
  0in\;&quot;&gt;Navigating SI Challenges: From traditional PCBs to Chiplets&amp;nbsp\;
 &lt;/span&gt;&lt;/p&gt;\n&lt;/td&gt;\n&lt;td style=&quot;width: 328.737px\; padding: 3pt\; height: 1
 82.363px\;&quot; valign=&quot;top&quot; width=&quot;41%&quot;&gt;\n&lt;p&gt;&lt;strong&gt;&lt;span style=&quot;font-family
 : &#39;Aptos&#39;\,sans-serif\; mso-bidi-font-family: Calibri\; color: #111111\; b
 order: none windowtext 1.0pt\; mso-border-alt: none windowtext 0in\; paddi
 ng: 0in\;&quot;&gt;Workshop 2&lt;/span&gt;&lt;/strong&gt;&lt;/p&gt;\n&lt;p&gt;&lt;span style=&quot;font-family: &#39;A
 ptos&#39;\,sans-serif\; mso-bidi-font-family: Calibri\; color: #111111\; borde
 r: none windowtext 1.0pt\; mso-border-alt: none windowtext 0in\; padding: 
 0in\;&quot;&gt;MASH Workforce&amp;nbsp\; Promoting a World-Class Workforce in the Semi
 conductor Industry&lt;strong&gt;&amp;nbsp\;&lt;/strong&gt;&lt;/span&gt;&lt;/p&gt;\n&lt;p&gt;&lt;span style=&quot;fon
 t-family: &#39;Aptos&#39;\,sans-serif\; mso-bidi-font-family: Calibri\; color: #11
 1111\; border: none windowtext 1.0pt\; mso-border-alt: none windowtext 0in
 \; padding: 0in\;&quot;&gt;Dr. Mark&amp;nbsp\; Threeton\,&amp;nbsp\; Penn State&lt;/span&gt;&lt;/p&gt;
 \n&lt;/td&gt;\n&lt;/tr&gt;\n&lt;tr style=&quot;height: 157.962px\;&quot;&gt;\n&lt;td style=&quot;width: 105.22
 5px\; height: 157.962px\;&quot; width=&quot;16%&quot;&gt;\n&lt;p&gt;&lt;span style=&quot;font-size: 12.0pt
 \; line-height: 107%\; font-family: &#39;Times New Roman&#39;\,serif\; mso-fareast
 -font-family: &#39;Times New Roman&#39;\; mso-ansi-language: EN-US\; mso-fareast-l
 anguage: EN-US\; mso-bidi-language: AR-SA\;&quot;&gt;10:45 to 11:45&lt;/span&gt;&lt;/p&gt;\n&lt;/
 td&gt;\n&lt;td style=&quot;width: 653.775px\; height: 157.962px\;&quot; colspan=&quot;2&quot; width=
 &quot;82%&quot;&gt;\n&lt;p&gt;&amp;nbsp\;&lt;/p&gt;\n&lt;p&gt;&lt;span style=&quot;font-family: &#39;Aptos&#39;\,sans-serif\;
  mso-bidi-font-family: Calibri\; color: #111111\; border: none windowtext 
 1.0pt\; mso-border-alt: none windowtext 0in\; padding: 0in\;&quot;&gt;The Mid-Atla
 ntic Semiconductor Hub&lt;/span&gt;&lt;/p&gt;\n&lt;p&gt;&lt;span style=&quot;font-family: &#39;Aptos&#39;\,s
 ans-serif\; mso-bidi-font-family: Calibri\; color: #111111\; border: none 
 windowtext 1.0pt\; mso-border-alt: none windowtext 0in\; padding: 0in\;&quot;&gt;D
 r. Daniel Lopez\, Penn State&lt;/span&gt;&lt;/p&gt;\n&lt;/td&gt;\n&lt;/tr&gt;\n&lt;tr style=&quot;height: 
 54.4px\;&quot;&gt;\n&lt;td style=&quot;width: 105.225px\; height: 54.4px\;&quot;&gt;\n&lt;p&gt;&lt;span sty
 le=&quot;font-size: 12.0pt\; line-height: 107%\; font-family: &#39;Times New Roman&#39;
 \,serif\; mso-fareast-font-family: &#39;Times New Roman&#39;\; mso-ansi-language: 
 EN-US\; mso-fareast-language: EN-US\; mso-bidi-language: AR-SA\;&quot;&gt;11:45 to
  12:15&lt;/span&gt;&lt;/p&gt;\n&lt;/td&gt;\n&lt;td style=&quot;height: 54.4px\; width: 653.775px\;&quot; 
 colspan=&quot;2&quot;&gt;\n&lt;p&gt;&lt;strong&gt;Lunch&lt;/strong&gt;&lt;/p&gt;\n&lt;/td&gt;\n&lt;/tr&gt;\n&lt;tr style=&quot;heig
 ht: 131.2px\;&quot;&gt;\n&lt;td style=&quot;width: 105.225px\; height: 131.2px\;&quot;&gt;\n&lt;p&gt;&lt;sp
 an style=&quot;font-size: 12.0pt\; line-height: 107%\; font-family: &#39;Times New 
 Roman&#39;\,serif\; mso-fareast-font-family: &#39;Times New Roman&#39;\; mso-ansi-lang
 uage: EN-US\; mso-fareast-language: EN-US\; mso-bidi-language: AR-SA\;&quot;&gt;&amp;n
 bsp\;12:15 to 1:15&amp;nbsp\;&lt;/span&gt;&lt;/p&gt;\n&lt;/td&gt;\n&lt;td style=&quot;width: 653.775px\;
  height: 131.2px\;&quot; colspan=&quot;2&quot;&gt;\n&lt;p&gt;&lt;strong&gt;&amp;nbsp\;&amp;nbsp\;&lt;/strong&gt;&lt;/p&gt;\n
 &lt;p&gt;Low-Cost SI Solutions for Every Engineer&lt;/p&gt;\n&lt;p&gt;Dr. E. Bogatin\, Unive
 rsity of Colorado&lt;/p&gt;\n&lt;/td&gt;\n&lt;/tr&gt;\n&lt;tr style=&quot;height: 116.613px\;&quot;&gt;\n&lt;td
  style=&quot;width: 105.225px\; height: 116.613px\;&quot;&gt;\n&lt;p&gt;&lt;span style=&quot;font-siz
 e: 12.0pt\; line-height: 107%\; font-family: &#39;Times New Roman&#39;\,serif\; ms
 o-fareast-font-family: &#39;Times New Roman&#39;\; mso-ansi-language: EN-US\; mso-
 fareast-language: EN-US\; mso-bidi-language: AR-SA\;&quot;&gt;1:20 to 2:20&lt;/span&gt;&lt;
 /p&gt;\n&lt;/td&gt;\n&lt;td style=&quot;height: 116.613px\; width: 653.775px\;&quot; colspan=&quot;2&quot;
 &gt;\n&lt;p&gt;&amp;nbsp\;&lt;/p&gt;\n&lt;p&gt;ISI Across HVM beyond 32G&lt;/p&gt;\n&lt;p style=&quot;margin: 0in
 \;&quot;&gt;&lt;span style=&quot;font-family: &#39;Aptos&#39;\,sans-serif\; mso-bidi-font-family: 
 Calibri\; color: #111111\; border: none windowtext 1.0pt\; mso-border-alt:
  none windowtext 0in\; padding: 0in\;&quot;&gt;Juan Martinez\, AMD SI Engineer&lt;/sp
 an&gt;&lt;/p&gt;\n&lt;/td&gt;\n&lt;/tr&gt;\n&lt;tr style=&quot;height: 131.2px\;&quot;&gt;\n&lt;td style=&quot;width: 1
 05.225px\; height: 131.2px\;&quot;&gt;\n&lt;p&gt;&lt;span style=&quot;font-size: 12.0pt\; line-h
 eight: 107%\; font-family: &#39;Times New Roman&#39;\,serif\; mso-fareast-font-fam
 ily: &#39;Times New Roman&#39;\; mso-ansi-language: EN-US\; mso-fareast-language: 
 EN-US\; mso-bidi-language: AR-SA\;&quot;&gt;2:25 to 3:25&lt;/span&gt;&lt;/p&gt;\n&lt;/td&gt;\n&lt;td st
 yle=&quot;height: 131.2px\; width: 653.775px\;&quot; colspan=&quot;2&quot;&gt;\n&lt;p&gt;&amp;nbsp\;&lt;/p&gt;\n&lt;
 p&gt;Signal Integrity meets Forward Error Correction&lt;/p&gt;\n&lt;p&gt;Howard Heck\, In
 tel Senior SI Engineer&lt;/p&gt;\n&lt;/td&gt;\n&lt;/tr&gt;\n&lt;tr style=&quot;height: 129.6px\;&quot;&gt;\n
 &lt;td style=&quot;width: 105.225px\; height: 129.6px\;&quot;&gt;\n&lt;p&gt;3:30 to 4:30&lt;/p&gt;\n&lt;/
 td&gt;\n&lt;td style=&quot;width: 325.038px\; height: 129.6px\;&quot;&gt;\n&lt;p class=&quot;MsoNorma
 l&quot; style=&quot;mso-margin-top-alt: auto\; mso-margin-bottom-alt: auto\; line-he
 ight: normal\;&quot;&gt;&lt;strong&gt;Workshop 3&lt;/strong&gt;&lt;/p&gt;\n&lt;p class=&quot;MsoNormal&quot; styl
 e=&quot;mso-margin-top-alt: auto\; mso-margin-bottom-alt: auto\; line-height: n
 ormal\;&quot;&gt;A novel VNA based utility to create N port S-parameter matrixes&amp;n
 bsp\;&lt;/p&gt;\n&lt;p class=&quot;MsoNormal&quot;&gt;E. Oseassen\, Rohde &amp;amp\; Schwarz&lt;/p&gt;\n&lt;p
 &gt;&lt;strong&gt;&amp;nbsp\;&lt;/strong&gt;&lt;/p&gt;\n&lt;/td&gt;\n&lt;td style=&quot;width: 328.737px\; height
 : 129.6px\;&quot;&gt;\n&lt;p&gt;&lt;strong&gt;&amp;nbsp\;Workshop 4&lt;/strong&gt;&lt;/p&gt;\n&lt;p&gt;Signal Integr
 ity Applications in Intelligent Connectivity Systems&lt;/p&gt;\n&lt;p&gt;W. Smith\, An
 sys&lt;/p&gt;\n&lt;/td&gt;\n&lt;/tr&gt;\n&lt;/tbody&gt;\n&lt;/table&gt;\n&lt;p&gt;&amp;nbsp\;&lt;/p&gt;
END:VEVENT
END:VCALENDAR