BEGIN:VCALENDAR VERSION:2.0 PRODID:IEEE vTools.Events//EN CALSCALE:GREGORIAN BEGIN:VTIMEZONE TZID:Asia/Kolkata BEGIN:STANDARD DTSTART:19451014T230000 TZOFFSETFROM:+0630 TZOFFSETTO:+0530 TZNAME:IST END:STANDARD END:VTIMEZONE BEGIN:VEVENT DTSTAMP:20240331T111454Z UID:AA8F78FF-B1F4-458F-AB55-2814FF276CD3 DTSTART;TZID=Asia/Kolkata:20240307T100000 DTEND;TZID=Asia/Kolkata:20240308T163500 DESCRIPTION:Objective:\nThe two-day Intercollege Quiz on VLSI Designs and S ustainability\, organized by IEEE JUIT Student Branch in collaboration wit h VLSI\, aimed to promote knowledge and awareness in the fields of Very La rge Scale Integration (VLSI) technology and sustainable practices within t he industry.\n\nDay 1: March 7th\, 2024 - Preliminary Rounds and Introduct ion to VLSI:\nThe event commenced with preliminary rounds of the quiz comp etition\, where teams from participating colleges showcased their knowledg e of VLSI designs and concepts. Following the quiz rounds\, an introductor y session on VLSI technology was conducted\, covering fundamental concepts such as semiconductor basics\, CMOS technology\, and logic design.\n\nDay 2: March 8th\, 2024 - Advanced Topics\, Sustainability\, and Final Rounds :\nThe second day featured advanced topics in VLSI design and sustainabili ty practices within the industry. Sessions included discussions on ASIC de sign flow\, FPGA programming\, and emerging trends like System-on-Chip (So C) and Internet of Things (IoT) integration. Additionally\, speakers share d insights into sustainable practices in VLSI manufacturing and design\, e mphasizing the importance of eco-friendly approaches and minimizing enviro nmental impact.\n\nHighlights:\n\nEngaging quiz competition stimulating in tellectual competition among participants from various colleges.\nInsightf ul sessions on advanced VLSI topics and sustainability practices\, enrichi ng participants' understanding of industry trends and challenges.\nNetwork ing opportunities with industry professionals\, fostering collaboration an d career development.\nCertificate of participation awarded to all attende es\, recognizing their contribution to the event.\nConclusion:\nThe IEEE J UIT SB Intercollege Quiz on VLSI Designs and Sustainability concluded succ essfully\, with participants expressing appreciation for the enriching exp erience and valuable insights gained. The event provided a platform for st udents to showcase their knowledge\, engage with industry experts\, and ex plore sustainable practices within the VLSI industry. The collaboration be tween IEEE JUIT SB and VLSI exemplified the commitment to promoting techni cal education and fostering innovation among the student community.\n\nRoo m: LT-2\, Jaypee University Of Information Technology\, Solan\, Himachal P radesh\, India\, 173234 LOCATION:Room: LT-2\, Jaypee University Of Information Technology\, Solan\, Himachal Pradesh\, India\, 173234 ORGANIZER:ieeesight@juitsolan.in SEQUENCE:13 SUMMARY:IEEE SIGHT JUIT Intercollege Quiz on VLSI Designs and Sustainabilit y URL;VALUE=URI:https://events.vtools.ieee.org/m/415402 X-ALT-DESC:Description: <br /><p>Objective:<br>The two-day Intercollege Qui z on VLSI Designs and Sustainability\, organized by IEEE JUIT Student Bran ch in collaboration with VLSI\, aimed to promote knowledge and awareness i n the fields of Very Large Scale Integration (VLSI) technology and sustain able practices within the industry.</p>\n<p>Day 1: March 7th\, 2024 - Prel iminary Rounds and Introduction to VLSI:<br>The event commenced with preli minary rounds of the quiz competition\, where teams from participating col leges showcased their knowledge of VLSI designs and concepts. Following th e quiz rounds\, an introductory session on VLSI technology was conducted\, covering fundamental concepts such as semiconductor basics\, CMOS technol ogy\, and logic design.</p>\n<p>Day 2: March 8th\, 2024 - Advanced Topics\ , Sustainability\, and Final Rounds:<br>The second day featured advanced t opics in VLSI design and sustainability practices within the industry. Ses sions included discussions on ASIC design flow\, FPGA programming\, and em erging trends like System-on-Chip (SoC) and Internet of Things (IoT) integ ration. Additionally\, speakers shared insights into sustainable practices in VLSI manufacturing and design\, emphasizing the importance of eco-frie ndly approaches and minimizing environmental impact.</p>\n<p>Highlights:</ p>\n<p>Engaging quiz competition stimulating intellectual competition amon g participants from various colleges.<br>Insightful sessions on advanced V LSI topics and sustainability practices\, enriching participants' understa nding of industry trends and challenges.<br>Networking opportunities with industry professionals\, fostering collaboration and career development.<b r>Certificate of participation awarded to all attendees\, recognizing thei r contribution to the event.<br>Conclusion:<br>The IEEE JUIT SB Intercolle ge Quiz on VLSI Designs and Sustainability concluded successfully\, with p articipants expressing appreciation for the enriching experience and valua ble insights gained. The event provided a platform for students to showcas e their knowledge\, engage with industry experts\, and explore sustainable practices within the VLSI industry. The collaboration between IEEE JUIT S B and VLSI exemplified the commitment to promoting technical education and fostering innovation among the student community.</p> END:VEVENT END:VCALENDAR