BEGIN:VCALENDAR
VERSION:2.0
PRODID:IEEE vTools.Events//EN
CALSCALE:GREGORIAN
BEGIN:VTIMEZONE
TZID:America/Los_Angeles
BEGIN:DAYLIGHT
DTSTART:20240310T030000
TZOFFSETFROM:-0800
TZOFFSETTO:-0700
RRULE:FREQ=YEARLY;BYDAY=2SU;BYMONTH=3
TZNAME:PDT
END:DAYLIGHT
BEGIN:STANDARD
DTSTART:20241103T010000
TZOFFSETFROM:-0700
TZOFFSETTO:-0800
RRULE:FREQ=YEARLY;BYDAY=1SU;BYMONTH=11
TZNAME:PST
END:STANDARD
END:VTIMEZONE
BEGIN:VEVENT
DTSTAMP:20240417T173021Z
UID:0442C805-A9BE-4724-8C1F-FB4E3E2A6109
DTSTART;TZID=America/Los_Angeles:20240415T160000
DTEND;TZID=America/Los_Angeles:20240415T173000
DESCRIPTION:If someone told you that the power\, noise\, distortion\, and a
 rea of a mixed-signal block could be reduced all at the same time\, you&#39;d 
 probably think that this was a lie. It turns out that it is indeed possibl
 e sometimes - and this talk will present an example called the continuous-
 time pipeline (CTP) ADC. The CTP is an emerging technique that combines fi
 ltering with analog-to-digital conversion. Like a continuous-time delta-si
 gma modulator (CTDSM)\, a CTP has a &quot;nice&quot; input impedance that is easy to
  drive and has inherent anti-aliasing. However\, unlike a CTDSM\, a CTP do
 es not require a high-speed feedback loop to be closed. As a result\, it c
 an achieve significantly higher bandwidth (like a Nyquist ADC). After disc
 ussing the operating principles behind the CTP\, we describe the fundament
 al benefits of the CTP over a conventional signal chain that incorporates 
 an anti-alias filter and a Nyquist-rate converter. We will then show desig
 n details and measurement results from a 100MHz 800MS/s CTP designed in a 
 65nm CMOS process.\n\nSpeaker(s): Dr. Shanthi Pavan\, \n\nBldg: Bldg Q\, 6
 455 Lusk Blvd\, San Diego\, California\, United States\, 92121
LOCATION:Bldg: Bldg Q\, 6455 Lusk Blvd\, San Diego\, California\, United St
 ates\, 92121
ORGANIZER:jfshi@ieee.org
SEQUENCE:9
SUMMARY:Continuous-Time Pipelined Analog-to-Digital Converters - Where Filt
 ering Meets Analog-to-Digital Conversion
URL;VALUE=URI:https://events.vtools.ieee.org/m/415784
X-ALT-DESC:Description: &lt;br /&gt;&lt;p&gt;&amp;nbsp\;If someone told you that the power\
 , noise\, distortion\, and area of a mixed-signal block could be reduced a
 ll at the same time\, you&#39;d probably think that this was a lie. It turns o
 ut that it is indeed possible sometimes - and this talk will present an ex
 ample called the&amp;nbsp\;continuous-time&amp;nbsp\;pipeline&amp;nbsp\;(&lt;wbr&gt;CTP)&amp;nbs
 p\;&amp;nbsp\;ADC.&amp;nbsp\; The CTP is an emerging technique that combines filte
 ring with analog-to-digital conversion. Like a continuous-time delta-sigma
  modulator (CTDSM)\, a CTP has a &quot;nice&quot; input impedance that is easy to dr
 ive and has inherent anti-aliasing. However\, unlike a CTDSM\, a CTP does 
 not require a high-speed feedback loop to be closed. As a result\, it can 
 achieve significantly higher bandwidth (like a Nyquist ADC). After discuss
 ing the operating principles behind the CTP\, we describe the fundamental 
 benefits of the CTP over a conventional signal chain that incorporates an 
 anti-alias filter and a Nyquist-rate converter. We will then show design d
 etails and measurement results from a 100MHz&amp;nbsp\; 800MS/s CTP designed i
 n a 65nm CMOS process.&amp;nbsp\;&lt;/p&gt;
END:VEVENT
END:VCALENDAR

