BEGIN:VCALENDAR VERSION:2.0 PRODID:IEEE vTools.Events//EN CALSCALE:GREGORIAN BEGIN:VTIMEZONE TZID:America/Los_Angeles BEGIN:DAYLIGHT DTSTART:20240310T030000 TZOFFSETFROM:-0800 TZOFFSETTO:-0700 RRULE:FREQ=YEARLY;BYDAY=2SU;BYMONTH=3 TZNAME:PDT END:DAYLIGHT BEGIN:STANDARD DTSTART:20241103T010000 TZOFFSETFROM:-0700 TZOFFSETTO:-0800 RRULE:FREQ=YEARLY;BYDAY=1SU;BYMONTH=11 TZNAME:PST END:STANDARD END:VTIMEZONE BEGIN:VEVENT DTSTAMP:20241130T231256Z UID:7C89D78A-79FB-4434-9D5C-87DFA561C276 DTSTART;TZID=America/Los_Angeles:20240523T113000 DTEND;TZID=America/Los_Angeles:20240523T130000 DESCRIPTION:Oxide based multilevel memristive switching devices for efficie nt analog In-memory computing in Artificial Intelligence applications\n\n[ ]\n\nDr. Glenn Ning Ge\n\nCEO\, TetraMem Inc\n\nTetraMem's memristive devi ces-based analog in-memory computing significantly boosts throughput and e nergy efficiency in deep learning. Our approach utilizes pre-trained synap tic weights from cloud-based training\, directly programming them into com puting memristors/multi-level RRAMs made with nanometer thin-films for edg e deployment and enabling post-tuning to accommodate specific scenarios.\n \nHigh-precision programmability ensures uniform performance across memris tive networks by necessitating numerous distinguishable conductance levels in each device. This advancement benefits applications like neural networ k training and inference computing.\n\nBy achieving stable 8 bits and abov e multi-levels conductance in individual memristor devices (up to 11 bits/ cell\, as featured in "Nature" main journal publication\, Mar 2023)\, we e nable monolithically integrated semiconductor chips\, featuring large cros sbar arrays on complementary metal-oxide-semiconductor (CMOS) circuits in the commercial foundry\, suitable for diverse AI applications. Our arbitra ry precision computing based on analog computing work is published with "S cience" main journal in Feb 2024.\n\n_________\n\nBio:\n\nDr. Glenn Ning G e\n\nis the CEO and co-founder of TetraMem\, a leading Silicon Valley star tup\n\nWith a decade of experience in the semiconductor sector\, he has co ntributed to numerous product innovations. He boasts around 800 global pat ent filings\, stemming from over 300 US/PCT patent families\, many of whic h are now in mass production.\n\nDr. Ge holds three Master’s degrees\, i ncluding an MBA from the University of Michigan's Ross School of Business\ , and a Ph.D. in Electrical Engineering from Nanyang Technological Univers ity\, Singapore.\n\nCo-sponsored by: CH06083 - SCV/SF Jt. Section Chapter\ , ED15\n\nBldg: ==> Use corner entrance: Kifer Road / San Lucar Court ==> Do not enter at main entrance on Kifer Road\, EAG Labs\, 810 Kifer Road\, Sunnyvale\, California\, United States\, 95051 LOCATION:Bldg: ==> Use corner entrance: Kifer Road / San Lucar Court ==> Do not enter at main entrance on Kifer Road\, EAG Labs\, 810 Kifer Road\, Su nnyvale\, California\, United States\, 95051 ORGANIZER:G.M.Friedman@ieee.org SEQUENCE:21 SUMMARY:Multilevel memristive switching devices for efficient analog In-mem ory AI URL;VALUE=URI:https://events.vtools.ieee.org/m/420760 X-ALT-DESC:Description: <br /><h1><em><strong>Oxide based multilevel memris tive switching devices for efficient analog In-memory computing in Artific ial Intelligence applications</strong></em></h1>\n<h3><img src="https://ev ents.vtools.ieee.org/vtools_ui/media/display/25b83066-1c29-482e-89a4-38713 7c37c90" alt="" width="300" height="350"></h3>\n<h3>Dr. Glenn Ning Ge</h3> \n<h3>CEO\, TetraMem Inc</h3>\n<h3><strong>TetraMem's memristive devices-b ased analog in-memory computing significantly boosts throughput and energy efficiency in deep learning. Our approach utilizes pre-trained synaptic w eights from cloud-based training\, directly programming them into computin g memristors/multi-level RRAMs made with nanometer thin-films for edge dep loyment and enabling post-tuning to accommodate specific scenarios.</stron g></h3>\n<p>&nbsp\;</p>\n<h3><strong>High-precision programmability ensure s uniform performance across memristive networks by necessitating numerous distinguishable conductance levels in each device. This advancement benef its applications like neural network training and inference computing.</st rong></h3>\n<p>&nbsp\;</p>\n<h3><strong>By achieving stable 8 bits and abo ve multi-levels conductance in individual memristor devices (up to 11 bits /cell\, as featured in "Nature" main journal publication\, Mar 2023)\, we enable monolithically integrated semiconductor chips\, featuring large cro ssbar arrays on complementary metal-oxide-semiconductor (CMOS) circuits in the commercial foundry\, suitable for diverse AI applications. Our arbitr ary precision computing based on analog computing work is published with " Science" main journal in Feb 2024</strong><strong>.</strong></h3>\n<p><str ong>_________</strong></p>\n<h3>Bio:</h3>\n<p>&nbsp\;</p>\n<h3>Dr. Glenn N ing Ge</h3>\n<h3>is the CEO and co-founder of TetraMem\, a leading Silicon Valley startup</h3>\n<p>&nbsp\;</p>\n<h3>With a decade of experience in t he semiconductor sector\, he has contributed to numerous product innovatio ns. He boasts around 800 global patent filings\, stemming from over 300 US /PCT patent families\, many of which are now in mass production.</h3>\n<p> &nbsp\;</p>\n<h3>Dr. Ge holds three Master&rsquo\;s degrees\, including an MBA from the University of Michigan's Ross School of Business\, and a Ph. D. in Electrical Engineering from Nanyang Technological University\, Singa pore.</h3> END:VEVENT END:VCALENDAR