BEGIN:VCALENDAR
VERSION:2.0
PRODID:IEEE vTools.Events//EN
CALSCALE:GREGORIAN
BEGIN:VTIMEZONE
TZID:Asia/Kolkata
BEGIN:STANDARD
DTSTART:19451014T230000
TZOFFSETFROM:+0630
TZOFFSETTO:+0530
TZNAME:IST
END:STANDARD
END:VTIMEZONE
BEGIN:VEVENT
DTSTAMP:20260126T171902Z
UID:88CFAA5A-AA20-46B9-A283-6DFB867313BA
DTSTART;TZID=Asia/Kolkata:20240914T180000
DTEND;TZID=Asia/Kolkata:20240914T200000
DESCRIPTION:During the webinar we shall discuss about the most widely used 
 digital IPs in the industry. These IPs are simple\, very old yet sold in t
 he market in billions. We will show the functionality and Verilog code to 
 implement them\n\nSpeaker(s): Aloke Das\, \n\nAgenda: \nWe shall talk abou
 t the following digital designs.\n\n- VGA\n- PWM\n- SPI\n- I2C\n- UART\n- 
 Memory\n- USB\n- Microprocessor\n\nVirtual: https://events.vtools.ieee.org
 /m/434003
LOCATION:Virtual: https://events.vtools.ieee.org/m/434003
ORGANIZER:aloke.das@ieee.org
SEQUENCE:17
SUMMARY:IEEE FABulous - Week 4
URL;VALUE=URI:https://events.vtools.ieee.org/m/434003
X-ALT-DESC:Description: &lt;br /&gt;&lt;p&gt;During the webinar we shall discuss about 
 the most widely used digital IPs in the industry. These IPs are simple\, v
 ery old yet sold in the market in billions. We will show the functionality
  and Verilog code to implement them&lt;/p&gt;&lt;br /&gt;&lt;br /&gt;Agenda: &lt;br /&gt;&lt;p&gt;We sha
 ll talk about the following digital designs.&lt;/p&gt;\n&lt;ul&gt;\n&lt;li&gt;VGA&lt;/li&gt;\n&lt;li&gt;
 PWM&lt;/li&gt;\n&lt;li&gt;SPI&lt;/li&gt;\n&lt;li&gt;I2C&lt;/li&gt;\n&lt;li&gt;UART&lt;/li&gt;\n&lt;li&gt;Memory&lt;/li&gt;\n&lt;li&gt;
 USB&lt;/li&gt;\n&lt;li&gt;Microprocessor&lt;/li&gt;\n&lt;/ul&gt;
END:VEVENT
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