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DTSTAMP:20241003T211953Z
UID:F2554E1F-7B98-4B51-A8F3-281D50036783
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DESCRIPTION:Delivering thousands of amps to the next generation of high-spe
 ed digital designs is fast becoming the biggest design challenge for the n
 ext generation of custom multi-die packages\, AI Chips\, and cloud server 
 applications. End-to-end power integrity digital twins with multiphase vol
 tage regulators\, PCB PDN with 100’s of capacitors\, and dynamic loads a
 re critical for mitigating expensive hardware failures when working with t
 housands of amps. This presentation will explore the model fidelity trade-
 offs and lessons learned from simulating the Picotest 2000 Amp Transient L
 oad Stepper demo board with a 55-phase MPS horizontal power delivery topol
 ogy and over 700 decoupling capacitors.\n\nConstructing and validating the
  PI digital twin will demonstrate various power integrity simulation tools
 . EM simulators for DC IR Drop\, DC Electrothermal\, and AC EM with Decap 
 optimization. Traditional frequency domain analysis with target impedance 
 combined with the Sandler Non-Invasive Stability Margin (NISM) for assessi
 ng phase margin helps mitigate resonances by designing for low Q flat impe
 dance. Voltage regulator modeling brings up the challenges of dynamic cont
 rol loops with small signal and non-linear large signal behavior. Final en
 d-to-end digital twin simulations make use of frequency domain Harmonic Ba
 lance simulators to jump directly to steady-state transient power rail rip
 ple for final pass/fail criteria.\n\nSpeaker(s): Heidi Barnes\, \n\nBldg: 
 HUB 350\, 350 Legget Dr\, Kanata\, Ontario\, Canada\, K2K 0G7
LOCATION:Bldg: HUB 350\, 350 Legget Dr\, Kanata\, Ontario\, Canada\, K2K 0G
 7
ORGANIZER:aabdella@ieee.org
SEQUENCE:36
SUMMARY:Digital Twin PI Simulations for 2000 Amp AI\, Cloud Compute\, and M
 ulti-Die Packages
URL;VALUE=URI:https://events.vtools.ieee.org/m/434729
X-ALT-DESC:Description: <br /><p class="MsoNormal"><img style="display: blo
 ck\; margin-left: auto\; margin-right: auto\;" src="https://events.vtools.
 ieee.org/vtools_ui/media/display/9f52a6b8-7607-4177-9b65-92eba691baf0" wid
 th="682" height="384"></p>\n<p class="MsoNormal">Delivering thousands of a
 mps to the next generation of high-speed digital designs is fast becoming 
 the biggest design challenge for the next generation of custom multi-die p
 ackages\, AI Chips\, and cloud server applications. &nbsp\;&nbsp\;&nbsp\;E
 nd-to-end power integrity digital twins with multiphase voltage regulators
 \, PCB PDN with 100&rsquo\;s of capacitors\, and dynamic loads are critica
 l for mitigating expensive hardware failures when working with thousands o
 f amps.&nbsp\; This presentation will explore the model fidelity trade-off
 s and lessons learned from simulating the Picotest 2000 Amp Transient Load
  Stepper demo board with a 55-phase MPS horizontal power delivery topology
  and over 700 decoupling capacitors.&nbsp\;</p>\n<p class="MsoNormal">Cons
 tructing and validating the PI digital twin will demonstrate various power
  integrity simulation tools.&nbsp\; EM simulators for DC IR Drop\, DC Elec
 trothermal\, and AC EM with Decap optimization.&nbsp\;&nbsp\;&nbsp\; Tradi
 tional frequency domain analysis with target impedance combined with the S
 andler Non-Invasive Stability Margin (NISM) for assessing phase margin hel
 ps mitigate resonances by designing for low Q flat impedance.&nbsp\; Volta
 ge regulator modeling brings up the challenges of dynamic control loops wi
 th small signal and non-linear large signal behavior.&nbsp\; Final end-to-
 end digital twin simulations make use of frequency domain Harmonic Balance
  simulators to jump directly to steady-state transient power rail ripple f
 or final pass/fail criteria.&nbsp\;&nbsp\;</p>
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