BEGIN:VCALENDAR VERSION:2.0 PRODID:IEEE vTools.Events//EN CALSCALE:GREGORIAN BEGIN:VTIMEZONE TZID:America/New_York BEGIN:DAYLIGHT DTSTART:20240310T030000 TZOFFSETFROM:-0500 TZOFFSETTO:-0400 RRULE:FREQ=YEARLY;BYDAY=2SU;BYMONTH=3 TZNAME:EDT END:DAYLIGHT BEGIN:STANDARD DTSTART:20241103T010000 TZOFFSETFROM:-0400 TZOFFSETTO:-0500 RRULE:FREQ=YEARLY;BYDAY=1SU;BYMONTH=11 TZNAME:EST END:STANDARD END:VTIMEZONE BEGIN:VEVENT DTSTAMP:20241102T011641Z UID:F8546182-6857-4A89-9F80-77D7698041B1 DTSTART;TZID=America/New_York:20241101T163000 DTEND;TZID=America/New_York:20241101T173000 DESCRIPTION:This talk will cover practical challenges for cryogenic CMOS de signs for next generation quantum computing. Starting from system level\, it will detail the design considerations for a non-multiplexed\, semi-auto nomous\, transmon qubit state controller (QSC) implemented in 14nm CMOS Fi nFET technology. The QSC includes an augmented general-purpose digital pro cessor that supports waveform generation and phase rotation operations com bined with a low power current-mode single sideband upconversion I/Q mixer -based RF arbitrary waveform generator (AWG). Implemented in 14nm CMOS Fin FET technology\, the QSC generates control signals in its target 4.5GHz to 5.5 GHz frequency range\, achieving an SFDR > 50dB for a signal bandwidth of 500MHz. With the controller operating in the 4K stage of a cryostat an d connected to a transmon qubit in the cryostat’s millikelvin stage\, me asured transmon T1 and T2 coherence times were 75.5μS and 73 μS\, respec tively\, in each case comparable to results achieved using conventional ro om temperature controls. In further tests with transmons\, a qubit-limited error rate of 7.76x10-4 per Clifford gate is achieved\, again comparable to results achieved using room temperature controls. The QSC’s maximum R F output power is -18 dBm\, and power dissipation per qubit under active c ontrol is 23mW\n\nSpeaker(s): Sudipto Chakraborty\, \n\nAgenda: \nRefreshm ents\n\nDistinguished Lecture\n\nRoom: B205\, Bldg: Engineering Quad\, Old en Street\, Princeton\, New Jersey\, United States\, 08544 LOCATION:Room: B205\, Bldg: Engineering Quad\, Olden Street\, Princeton\, N ew Jersey\, United States\, 08544 ORGANIZER:fran.oconnell@gmail.com SEQUENCE:42 SUMMARY:IEEE PCJS Distinguished Lecture by Sudipto Chakraborty URL;VALUE=URI:https://events.vtools.ieee.org/m/441465 X-ALT-DESC:Description: <br /><p>This talk will cover practical challenges for cryogenic CMOS designs for next generation quantum computing. Starting from system level\, it will detail the design considerations for a non-mu ltiplexed\, semi-autonomous\, transmon qubit state controller (QSC) implem ented in 14nm CMOS FinFET technology. The QSC includes an augmented genera l-purpose digital processor that supports waveform generation and phase ro tation operations combined with a low power current-mode single sideband u pconversion I/Q mixer-based RF arbitrary waveform generator (AWG). Impleme nted in 14nm CMOS FinFET technology\, the QSC generates control signals in its target 4.5GHz to 5.5 GHz frequency range\, achieving an SFDR &gt\; 50 dB for a signal bandwidth of 500MHz. With the controller operating in the 4K stage of a cryostat and connected to a transmon qubit in the cryostat&r squo\;s millikelvin stage\, measured transmon T1 and T2 coherence times we re 75.5&mu\;S and 73 &mu\;S\, respectively\, in each case comparable to re sults achieved using conventional room temperature controls. In further te sts with transmons\, a qubit-limited error rate of 7.76x10-4 per Clifford gate is achieved\, again comparable to results achieved using room tempera ture controls. The QSC&rsquo\;s maximum RF output power is -18 dBm\, and p ower dissipation per qubit under active control is 23mW</p><br /><br />Age nda: <br /><p>&nbsp\;</p>\n<p>Refreshments</p>\n<p>Distinguished Lecture</ p> END:VEVENT END:VCALENDAR