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DTSTART:20170312T030000
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BEGIN:VEVENT
DTSTAMP:20170531T204424Z
UID:70FCF680-3526-11E7-8752-0050568D2FB3
DTSTART;TZID=America/Los_Angeles:20170531T183000
DTEND;TZID=America/Los_Angeles:20170531T203000
DESCRIPTION:Presented by the IEEE San Diego Young Professionals\n\nABSTRACT
 \n\nContinued consumer demand for mobile ICs has propelled CMOS scaling to
  arrive at the finFET with foundry offerings starting at 16/14 nm. The com
 pact 3-D structure of the finFET offers superior short-channel control tha
 t achieves digital power reduction and adequate device performance. As SoC
  technology remains dictated by logic and SRAM scaling needs\, designers o
 f analog/mixed-signal subsystems must adapt to new design constraints. We 
 attempt to summarize the challenges and considerations faced when porting 
 analog/mixed-signal designs to finFET. At 16/14 nm\, designers must also c
 ope with many accumulated implications of earlier scaling innovations lead
 ing to the finFET.\n\nIn addition\, the IEEE San Diego Young Professionals
  Section is offering a Young Professionals &amp; Students career coaching sess
 ion after the talk and a Q&amp;A\n\nSpeaker(s): Alvin Loke\, \, Alvin Loke\, \
 n\nAgenda: \n6:30 - 7:00 Networking and refreshments\n\n7:00 - 8:00 Talk\n
 \n8:00- 8:30 Career coaching and Q&amp;A\n\nBldg: Building AZ Multipurpose roo
 m A/B/C\, Qualcomm Technologies\, 10155 Pacific Heights Blvd\, San Diego\,
  California\, United States\, 92121
LOCATION:Bldg: Building AZ Multipurpose room A/B/C\, Qualcomm Technologies\
 , 10155 Pacific Heights Blvd\, San Diego\, California\, United States\, 92
 121
ORGANIZER:yicaohome@gmail.com
SEQUENCE:2
SUMMARY:Analog/Mixed-Signal Design in FinFET With Dr. Alvin Loke
URL;VALUE=URI:https://events.vtools.ieee.org/m/45465
X-ALT-DESC:Description: &lt;br /&gt;&lt;p id=&quot;yui_3_16_0_ym19_1_1493330241720_5997&quot;&gt;
 &lt;strong id=&quot;yui_3_16_0_ym19_1_1493330241720_6000&quot;&gt;&lt;span id=&quot;yui_3_16_0_ym1
 9_1_1493330241720_5999&quot;&gt;Presented by the IEEE San Diego Young Professional
 s&amp;nbsp\;&lt;/span&gt;&lt;/strong&gt;&lt;/p&gt;\n&lt;p&gt;&lt;strong&gt;ABSTRACT&lt;/strong&gt;&lt;/p&gt;\n&lt;p&gt;Continu
 ed consumer demand for mobile ICs has propelled CMOS scaling to arrive at 
 the finFET with foundry offerings starting at 16/14 nm. The compact 3-D st
 ructure of the finFET offers superior short-channel control that achieves 
 digital power reduction and adequate device performance. As SoC technology
  remains dictated by logic and SRAM scaling needs\, designers of analog/mi
 xed-signal subsystems must adapt to new design constraints. We attempt to 
 summarize the challenges and considerations faced when porting analog/mixe
 d-signal designs to finFET. At 16/14 nm\, designers must also cope with ma
 ny accumulated implications of earlier scaling innovations leading to the 
 finFET.&lt;/p&gt;\n&lt;p&gt;In addition\, the IEEE San Diego Young Professionals Secti
 on is offering a Young Professionals &amp;amp\; Students career coaching sessi
 on after the talk and a Q&amp;amp\;A&amp;nbsp\;&lt;/p&gt;&lt;br /&gt;&lt;br /&gt;Agenda: &lt;br /&gt;&lt;p st
 yle=&quot;margin: 0in 0in 7.5pt 0in\;&quot;&gt;&lt;span style=&quot;font-size: 10.5pt\; font-fa
 mily: Verdana\; color: #616161\;&quot;&gt;6:30 - 7:00 Networking and refreshments&lt;
 /span&gt;&lt;/p&gt;\n&lt;p style=&quot;box-sizing: border-box\; font-variant-caps: normal\;
  orphans: auto\; text-align: start\; widows: auto\; -webkit-text-size-adju
 st: auto\; -webkit-text-stroke-width: 0px\; word-spacing: 0px\; margin: 0i
 n 0in 7.5pt 0in\;&quot;&gt;&lt;span style=&quot;font-size: 10.5pt\; font-family: Verdana\;
  color: #616161\;&quot;&gt;7:00 - 8:00 Talk&lt;/span&gt;&lt;/p&gt;\n&lt;p style=&quot;box-sizing: bord
 er-box\; font-variant-caps: normal\; orphans: auto\; text-align: start\; w
 idows: auto\; -webkit-text-size-adjust: auto\; -webkit-text-stroke-width: 
 0px\; word-spacing: 0px\; margin: 0in 0in 7.5pt 0in\;&quot;&gt;&lt;span style=&quot;font-s
 ize: 10.5pt\; font-family: Verdana\; color: #616161\;&quot;&gt;8:00- 8:30 Career c
 oaching and Q&amp;amp\;A&lt;/span&gt;&lt;/p&gt;\n&lt;p style=&quot;box-sizing: border-box\; font-v
 ariant-caps: normal\; orphans: auto\; text-align: start\; widows: auto\; -
 webkit-text-size-adjust: auto\; -webkit-text-stroke-width: 0px\; word-spac
 ing: 0px\; margin: 0in 0in 7.5pt 0in\;&quot;&gt;&amp;nbsp\;&lt;/p&gt;
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