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VERSION:2.0
PRODID:IEEE vTools.Events//EN
CALSCALE:GREGORIAN
BEGIN:VTIMEZONE
TZID:Asia/Kolkata
BEGIN:STANDARD
DTSTART:19451014T230000
TZOFFSETFROM:+0630
TZOFFSETTO:+0530
TZNAME:IST
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BEGIN:VEVENT
DTSTAMP:20250303T162914Z
UID:9E07E840-D60C-4840-8B2E-8F18D74D84F4
DTSTART;TZID=Asia/Kolkata:20250219T082000
DTEND;TZID=Asia/Kolkata:20250219T232400
DESCRIPTION:INAUGURATION OF VLSI CHAPTER\n\nOn 21st February 2025\, the Ram
 egowda Seminar Hall at BIT was the venue for a significant and momentous e
 vent—the inauguration of the IEEE BIT VLSI Chapter. This occasion not on
 ly marked the launch of a new chapter dedicated to the dynamic field of Ve
 ry Large-Scale Integration (VLSI) but also celebrated the achievements and
  aspirations of the IEEE student branch at BIT. The event brought together
  a prestigious group of guests\, faculty members\, students\, and professi
 onals\, highlighting the importance of the new chapter in advancing techno
 logical research and innovation.\n\n- Shri Ashok S.D. Jayaram\, Chairman o
 f BIT\, addressed the gathering and highlighted the importance of VLSI in 
 today’s fast-paced technological world. He noted that the establishment 
 of the IEEE VLSI Chapter is a step towards enriching BIT’s academic land
 scape by creating opportunities for students to engage in cutting-edge res
 earch and connect with industry professionals.\n- Dr. Aswath M.U\, Princip
 al of BIT\, emphasized the institution’s commitment to providing student
 s with worldHe also spoke about the active participation and engagement of
  the club in the institution.\n- Dr. Vijaya Prakash A.M\, Head of the Depa
 rtment of VLSI\, shared his excitement about the chapter’s establishment
 \, stressing that it would provide a platform for students to gain practic
 al knowledge in VLSI design\, fabrication\, and related fields. .\n- Dr. H
 emanth Kumar A.R\, Dean of Academics\, expressed his support for the chapt
 er and emphasized how it aligns with BIT’s academic mission to foster co
 ntinuous learning and growth.\n- Mr. Aloke Das\, Chair of IEEE CAS Bangalo
 re\, gave a keynote address\, congratulating the BIT community for launchi
 ng the VLSI Chapter. He spoke about the global impact of IEEE chapters and
  the role they play in shaping the future of technology.\n\nThe chapter ai
 ms to organize a variety of events such as workshops\, seminars\, conferen
 ces\, and hands-on projects that will provide members with the knowledge a
 nd skills needed to excel in the VLSI domain. Additionally\, the chapter w
 ill act as a conduit for collaborations with research labs\, technology co
 mpanies\, and other IEEE chapters around the world\, helping students acce
 ss global opportunities and stay updated with the latest advancements in t
 he field.\n\nA momentous part of the event was the Badging Ceremony\, wher
 e the new EXECOM (Executive Committee) team of the IEEE BIT VLSI Chapter w
 as formally introduced and given their badges.This marked the official han
 dover of responsibilities to the new team\, who will lead the chapter’s 
 initiatives for the upcoming term. The new EXECOM members were warmly cong
 ratulated and encouraged to take the chapter to new heights of success by 
 engaging students\, organizing impactful events\, and forging collaboratio
 ns with industry professionals.\n\nAs we embark on this new journey with t
 he IEEE BIT VLSI Chapter\, let us remember that innovation begins with cur
 iosity\, and progress is fuelled by collaboration. Let this chapter be a r
 eminder that the pursuit of knowledge is limitless\, and with passion\, de
 dication\, and teamwork\, we can turn our dreams into impactful realities.
  The future of VLSI is in our hands—let us create it.Top of Form\n\nBott
 om of Form\n\nRoom: Seminar hall\, Bldg: Main building\, Bangalore\, Karna
 taka\, India\, 560004
LOCATION:Room: Seminar hall\, Bldg: Main building\, Bangalore\, Karnataka\,
  India\, 560004
ORGANIZER:jalajas@ieee.org
SEQUENCE:2
SUMMARY:INAUGURATION OF VLSI CHAPTER
URL;VALUE=URI:https://events.vtools.ieee.org/m/471393
X-ALT-DESC:Description: &lt;br /&gt;&lt;p class=&quot;MsoNormal&quot; style=&quot;text-align: cente
 r\;&quot; align=&quot;center&quot;&gt;&lt;span style=&quot;font-family: &#39;times new roman&#39;\, times\, 
 serif\;&quot;&gt;&lt;strong&gt;&lt;span style=&quot;font-size: 16.0pt\; line-height: 115%\;&quot;&gt;INA
 UGURATION OF VLSI CHAPTER&lt;/span&gt;&lt;/strong&gt;&lt;/span&gt;&lt;/p&gt;\n&lt;p class=&quot;MsoNormal&quot;
  style=&quot;text-align: center\;&quot; align=&quot;center&quot;&gt;&lt;span style=&quot;font-family: &#39;ti
 mes new roman&#39;\, times\, serif\;&quot;&gt;&lt;img src=&quot;https://events.vtools.ieee.org
 /vtools_ui/media/display/f0e28056-be70-447c-83d2-3362ed2e9759&quot; width=&quot;240&quot;
  height=&quot;214&quot;&gt;&lt;br&gt;&lt;!--[endif]--&gt;&lt;/span&gt;&lt;/p&gt;\n&lt;p class=&quot;MsoNormal&quot; style=&quot;t
 ext-align: justify\;&quot;&gt;&lt;span style=&quot;font-family: &#39;times new roman&#39;\, times\
 , serif\;&quot;&gt;On 21st February 2025\, the Ramegowda Seminar Hall at BIT was t
 he venue for a significant and momentous event&amp;mdash\;the inauguration of 
 the IEEE BIT VLSI Chapter. This occasion not only marked the launch of a n
 ew chapter dedicated to the dynamic field of Very Large-Scale Integration 
 (VLSI) but also celebrated the achievements and aspirations of the IEEE st
 udent branch at BIT. The event brought together a prestigious group of gue
 sts\, faculty members\, students\, and professionals\, highlighting the im
 portance of the new chapter in advancing technological research and innova
 tion.&lt;/span&gt;&lt;/p&gt;\n&lt;p class=&quot;MsoNormal&quot;&gt;&lt;span style=&quot;font-family: &#39;times ne
 w roman&#39;\, times\, serif\;&quot;&gt;&lt;span style=&quot;mso-spacerun: yes\;&quot;&gt;&amp;nbsp\; &amp;nbs
 p\; &amp;nbsp\; &amp;nbsp\; &amp;nbsp\; &amp;nbsp\; &amp;nbsp\; &amp;nbsp\; &amp;nbsp\; &amp;nbsp\; &amp;nbsp\
 ; &amp;nbsp\; &amp;nbsp\; &lt;img src=&quot;https://events.vtools.ieee.org/vtools_ui/media
 /display/52cfdd1d-0530-41a0-821a-94fef7ba1e16&quot; width=&quot;539&quot; height=&quot;299&quot;&gt;&lt;/
 span&gt;&lt;!--[endif]--&gt;&lt;/span&gt;&lt;/p&gt;\n&lt;p class=&quot;MsoNormal&quot;&gt;&lt;span style=&quot;font-fam
 ily: &#39;times new roman&#39;\, times\, serif\;&quot;&gt;&lt;span style=&quot;mso-spacerun: yes\;
 &quot;&gt;&amp;nbsp\;&amp;nbsp\;&amp;nbsp\;&amp;nbsp\;&amp;nbsp\;&amp;nbsp\;&amp;nbsp\;&amp;nbsp\;&amp;nbsp\;&amp;nbsp\;&amp;n
 bsp\;&amp;nbsp\;&amp;nbsp\;&amp;nbsp\;&amp;nbsp\;&amp;nbsp\;&amp;nbsp\;&amp;nbsp\;&amp;nbsp\;&amp;nbsp\;&amp;nbsp\
 ;&amp;nbsp\;&amp;nbsp\;&amp;nbsp\;&amp;nbsp\;&amp;nbsp\;&amp;nbsp\;&amp;nbsp\;&amp;nbsp\;&amp;nbsp\;&amp;nbsp\;&amp;nb
 sp\;&amp;nbsp\;&amp;nbsp\;&amp;nbsp\;&amp;nbsp\;&amp;nbsp\;&amp;nbsp\;&amp;nbsp\;&amp;nbsp\;&amp;nbsp\;&amp;nbsp\;
 &amp;nbsp\;&amp;nbsp\;&amp;nbsp\;&amp;nbsp\;&amp;nbsp\;&amp;nbsp\;&amp;nbsp\;&amp;nbsp\;&amp;nbsp\;&amp;nbsp\; &lt;/s
 pan&gt;&lt;/span&gt;&lt;/p&gt;\n&lt;ul style=&quot;margin-top: 0cm\;&quot; type=&quot;disc&quot;&gt;\n&lt;li class=&quot;Ms
 oNormal&quot; style=&quot;text-align: justify\; font-family: &#39;times new roman&#39;\, tim
 es\, serif\;&quot;&gt;&lt;span style=&quot;font-family: &#39;times new roman&#39;\, times\, serif\
 ;&quot;&gt;&lt;strong&gt;Shri Ashok S.D. Jayaram&lt;/strong&gt;\, Chairman of BIT\, addressed 
 the gathering and highlighted the importance of VLSI in today&amp;rsquo\;s fas
 t-paced technological world. He noted that the establishment of the IEEE V
 LSI Chapter is a step towards enriching BIT&amp;rsquo\;s academic landscape by
  creating opportunities for students to engage in cutting-edge research an
 d connect with industry professionals.&lt;/span&gt;&lt;/li&gt;\n&lt;li class=&quot;MsoNormal&quot; 
 style=&quot;text-align: justify\; font-family: &#39;times new roman&#39;\, times\, seri
 f\;&quot;&gt;&lt;span style=&quot;font-family: &#39;times new roman&#39;\, times\, serif\;&quot;&gt;&lt;stron
 g&gt;Dr. Aswath M.U&lt;/strong&gt;\, Principal of BIT\, emphasized the institution&amp;
 rsquo\;s commitment to providing students with worldHe also spoke about th
 e active participation and engagement of the club in the institution.&lt;/spa
 n&gt;&lt;/li&gt;\n&lt;li class=&quot;MsoNormal&quot; style=&quot;text-align: justify\; font-family: &#39;
 times new roman&#39;\, times\, serif\;&quot;&gt;&lt;span style=&quot;font-family: &#39;times new r
 oman&#39;\, times\, serif\;&quot;&gt;&lt;strong&gt;Dr. Vijaya Prakash A.M&lt;/strong&gt;\, Head of
  the Department of VLSI\, shared his excitement about the chapter&amp;rsquo\;s
  establishment\, stressing that it would provide a platform for students t
 o gain practical knowledge in VLSI design\, fabrication\, and related fiel
 ds. .&lt;/span&gt;&lt;/li&gt;\n&lt;li class=&quot;MsoNormal&quot; style=&quot;text-align: justify\; font
 -family: &#39;times new roman&#39;\, times\, serif\;&quot;&gt;&lt;span style=&quot;font-family: &#39;t
 imes new roman&#39;\, times\, serif\;&quot;&gt;&lt;strong&gt;Dr. Hemanth Kumar A.R&lt;/strong&gt;\
 , Dean of Academics\, expressed his support for the chapter and emphasized
  how it aligns with BIT&amp;rsquo\;s academic mission to foster continuous lea
 rning and growth.&amp;nbsp\;&lt;/span&gt;&lt;/li&gt;\n&lt;li class=&quot;MsoNormal&quot; style=&quot;text-al
 ign: justify\; font-family: &#39;times new roman&#39;\, times\, serif\;&quot;&gt;&lt;span sty
 le=&quot;font-family: &#39;times new roman&#39;\, times\, serif\;&quot;&gt;&lt;strong&gt;Mr. Aloke Da
 s&lt;/strong&gt;\, Chair of IEEE CAS Bangalore\, gave a keynote address\, congra
 tulating the BIT community for launching the VLSI Chapter. He spoke about 
 the global impact of IEEE chapters and the role they play in shaping the f
 uture of technology.&amp;nbsp\;&lt;/span&gt;&lt;/li&gt;\n&lt;/ul&gt;\n&lt;p class=&quot;MsoNormal&quot; style
 =&quot;margin-left: 36.0pt\;&quot;&gt;&lt;span style=&quot;font-family: &#39;times new roman&#39;\, tim
 es\, serif\;&quot;&gt;&lt;span style=&quot;mso-spacerun: yes\;&quot;&gt;&amp;nbsp\; &amp;nbsp\; &amp;nbsp\; &amp;n
 bsp\; &amp;nbsp\; &amp;nbsp\; &amp;nbsp\; &amp;nbsp\; &amp;nbsp\; &amp;nbsp\; &amp;nbsp\; &amp;nbsp\; &amp;nbs
 p\; &amp;nbsp\; &amp;nbsp\; &amp;nbsp\; &amp;nbsp\; &amp;nbsp\; &amp;nbsp\;&lt;img src=&quot;https://event
 s.vtools.ieee.org/vtools_ui/media/display/c8bdf33c-7845-485b-b0b6-c64f5248
 da64&quot; width=&quot;349&quot; height=&quot;260&quot;&gt;&lt;/span&gt;&lt;span style=&quot;mso-spacerun: yes\;&quot;&gt;&amp;n
 bsp\; &amp;nbsp\; &amp;nbsp\; &amp;nbsp\; &amp;nbsp\;&amp;nbsp\;&lt;/span&gt;&lt;/span&gt;&lt;/p&gt;\n&lt;p class=&quot;
 MsoNormal&quot; style=&quot;text-align: justify\;&quot;&gt;&lt;span style=&quot;font-family: &#39;times 
 new roman&#39;\, times\, serif\;&quot;&gt;The chapter aims to organize a variety of ev
 ents such as workshops\, seminars\, conferences\, and hands-on projects th
 at will provide members with the knowledge and skills needed to excel in t
 he VLSI domain. Additionally\, the chapter will act as a conduit for colla
 borations with research labs\, technology companies\, and other IEEE chapt
 ers around the world\, helping students access global opportunities and st
 ay updated with the latest advancements in the field.&lt;/span&gt;&lt;/p&gt;\n&lt;p class
 =&quot;MsoNormal&quot;&gt;&lt;span style=&quot;font-family: &#39;times new roman&#39;\, times\, serif\;
 &quot;&gt;&lt;span style=&quot;mso-spacerun: yes\;&quot;&gt;&amp;nbsp\; &amp;nbsp\; &amp;nbsp\; &amp;nbsp\; &amp;nbsp\
 ; &amp;nbsp\; &amp;nbsp\; &amp;nbsp\; &amp;nbsp\; &amp;nbsp\; &amp;nbsp\; &amp;nbsp\; &amp;nbsp\; &amp;nbsp\; 
 &amp;nbsp\; &amp;nbsp\; &amp;nbsp\; &amp;nbsp\; &amp;nbsp\; &amp;nbsp\; &lt;img src=&quot;https://events.v
 tools.ieee.org/vtools_ui/media/display/31e89914-6c0c-47de-9cde-6caec8c6798
 2&quot; width=&quot;493&quot; height=&quot;370&quot;&gt;&lt;/span&gt;&lt;!--[endif]--&gt;&lt;/span&gt;&lt;/p&gt;\n&lt;p class=&quot;Ms
 oNormal&quot;&gt;&lt;span style=&quot;font-family: &#39;times new roman&#39;\, times\, serif\;&quot;&gt;A 
 momentous part of the event was the Badging Ceremony\, where the new EXECO
 M (Executive Committee) team of the IEEE BIT VLSI Chapter was formally int
 roduced and given their badges.This marked the official handover of respon
 sibilities to the new team\, who will lead the chapter&amp;rsquo\;s initiative
 s for the upcoming term. The new EXECOM members were warmly congratulated 
 and encouraged to take the chapter to new heights of success by engaging s
 tudents\, organizing impactful events\, and forging collaborations with in
 dustry professionals.&amp;nbsp\;&lt;/span&gt;&lt;/p&gt;\n&lt;p class=&quot;MsoNormal&quot;&gt;&lt;span style=
 &quot;font-family: &#39;times new roman&#39;\, times\, serif\;&quot;&gt;&lt;span style=&quot;mso-spacer
 un: yes\;&quot;&gt;&amp;nbsp\; &amp;nbsp\; &amp;nbsp\; &amp;nbsp\; &amp;nbsp\;&lt;/span&gt;&lt;/span&gt;&lt;span styl
 e=&quot;font-family: &#39;times new roman&#39;\, times\, serif\;&quot;&gt;&amp;nbsp\; &amp;nbsp\; &amp;nbsp
 \; &amp;nbsp\; &amp;nbsp\; &amp;nbsp\; &amp;nbsp\; &amp;nbsp\; &amp;nbsp\; &amp;nbsp\;&lt;/span&gt;&lt;img styl
 e=&quot;font-family: &#39;times new roman&#39;\, times\, serif\;&quot; src=&quot;https://events.v
 tools.ieee.org/vtools_ui/media/display/02baf113-e738-46b9-872e-808f8ac6cb4
 2&quot; width=&quot;337&quot; height=&quot;405&quot;&gt;&lt;span style=&quot;font-family: &#39;times new roman&#39;\, 
 times\, serif\;&quot;&gt;&lt;!--[endif]--&gt;&lt;/span&gt;&lt;/p&gt;\n&lt;p class=&quot;MsoNormal&quot; style=&quot;te
 xt-align: justify\;&quot;&gt;&lt;span style=&quot;font-family: &#39;times new roman&#39;\, times\,
  serif\;&quot;&gt;As we embark on this new journey with the IEEE BIT VLSI Chapter\
 , let us remember that innovation begins with curiosity\, and progress is 
 fuelled by collaboration. Let this chapter be a reminder that the pursuit 
 of knowledge is limitless\, and with passion\, dedication\, and teamwork\,
  we can turn our dreams into impactful realities. The future of VLSI is in
  our hands&amp;mdash\;let us create it.&lt;span style=&quot;display: none\; mso-hide: 
 all\;&quot;&gt;Top of Form&lt;/span&gt;&lt;/span&gt;&lt;/p&gt;\n&lt;p class=&quot;MsoNormal&quot;&gt;&amp;nbsp\;&lt;/p&gt;\n&lt;p
  class=&quot;MsoNormal&quot; style=&quot;text-align: left\;&quot;&gt;&amp;nbsp\;&lt;/p&gt;\n&lt;p class=&quot;MsoNo
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 ly: &#39;times new roman&#39;\, times\, serif\;&quot;&gt;Bottom of Form&lt;/span&gt;&lt;/p&gt;\n&lt;p cla
 ss=&quot;MsoNormal&quot; style=&quot;text-align: justify\;&quot;&gt;&amp;nbsp\;&lt;/p&gt;
END:VEVENT
END:VCALENDAR

