BEGIN:VCALENDAR
VERSION:2.0
PRODID:IEEE vTools.Events//EN
CALSCALE:GREGORIAN
BEGIN:VTIMEZONE
TZID:America/Los_Angeles
BEGIN:DAYLIGHT
DTSTART:20250309T030000
TZOFFSETFROM:-0800
TZOFFSETTO:-0700
RRULE:FREQ=YEARLY;BYDAY=2SU;BYMONTH=3
TZNAME:PDT
END:DAYLIGHT
BEGIN:STANDARD
DTSTART:20251102T010000
TZOFFSETFROM:-0700
TZOFFSETTO:-0800
RRULE:FREQ=YEARLY;BYDAY=1SU;BYMONTH=11
TZNAME:PST
END:STANDARD
END:VTIMEZONE
BEGIN:VEVENT
DTSTAMP:20250426T155319Z
UID:5502E460-D3B4-4B71-95B9-1B14FC5345DD
DTSTART;TZID=America/Los_Angeles:20250424T100000
DTEND;TZID=America/Los_Angeles:20250424T110000
DESCRIPTION:UNIVERSAL VERIFICATION METHOD: ASSURING DESIGN CORRECTNESS WITH
  CLASS\n\nUVM\, a set of standardized prototype objects and classes to be 
 used in SystemVerilog test benches\, has become the industry standard tool
  for integrated circuit design verification. What is it\, and what can it 
 do for you?\n\nThis event is part of the IEEE San Diego Section's PDH seri
 es at the Del Mar Electronics and Manufacturing Show (Apr 23 - 24).\n\nSpe
 aker(s): John A Eldon\n\nAgenda: \nPlease use this event's registration to
  sign up for PHD credits. Everyone is welcome to attend this talk.\n\nIf y
 ou want PDH credit for this talk\, please register on this site. If you si
 mply want to attend\, see more info[on the show site](https://www.mfgshow.
 com/seminars/speak.cfm?Id=238).\n\nPlease register on this site using the 
 name you want on the PDH certificate. Also use the email address that you 
 want the certificate mailed to.\n\nRoom: Room A\, Bldg: Mission Tower\, 22
 60 Jimmy Durante Blvd\, Del Mar Fairgrounds\, Del Mar\, California\, Unite
 d States\, 92014
LOCATION:Room: Room A\, Bldg: Mission Tower\, 2260 Jimmy Durante Blvd\, Del
  Mar Fairgrounds\, Del Mar\, California\, United States\, 92014
ORGANIZER:m.w.bryant@ieee.org
SEQUENCE:44
SUMMARY:DMEMS - PDH Series -"UNIVERSAL VERIFICATION METHOD: ASSURING DESIGN
  CORRECTNESS WITH CLASS"
URL;VALUE=URI:https://events.vtools.ieee.org/m/474416
X-ALT-DESC:Description: <br /><p class="MsoNormal" style="text-align: cente
 r\;" align="center"><span style="font-size: 18pt\;">UNIVERSAL VERIFICATION
  METHOD: ASSURING DESIGN CORRECTNESS WITH CLASS</span></p>\n<p class="MsoN
 ormal">UVM\, a set of standardized prototype objects and classes to be use
 d in SystemVerilog test benches\, has become the industry standard tool fo
 r integrated circuit design verification. What is it\, and what can it do 
 for you?&nbsp\;</p>\n<p class="MsoNormal">&nbsp\;</p>\n<p class="MsoNormal
 ">This event is part of the IEEE San Diego Section's PDH series at the Del
  Mar Electronics and Manufacturing Show (Apr 23 - 24).&nbsp\;</p>\n<p clas
 s="MsoNormal">&nbsp\;</p><br /><br />Agenda: <br /><p>Please use this even
 t's registration to sign up for PHD credits.&nbsp\; Everyone is welcome to
  attend this talk.&nbsp\;</p>\n<p>If you want PDH credit for this talk\, p
 lease register on this site.&nbsp\;&nbsp\; If you simply want to attend\, 
 see more info<a href="https://www.mfgshow.com/seminars/speak.cfm?Id=238" t
 arget="_blank" rel="noopener"> on the show site</a>.</p>\n<p>Please regist
 er on this site using the name you want on the PDH certificate.&nbsp\; Als
 o use the email address that you want the certificate mailed to.</p>
END:VEVENT
END:VCALENDAR