BEGIN:VCALENDAR VERSION:2.0 PRODID:IEEE vTools.Events//EN CALSCALE:GREGORIAN BEGIN:VTIMEZONE TZID:America/New_York BEGIN:DAYLIGHT DTSTART:20250309T030000 TZOFFSETFROM:-0500 TZOFFSETTO:-0400 RRULE:FREQ=YEARLY;BYDAY=2SU;BYMONTH=3 TZNAME:EDT END:DAYLIGHT BEGIN:STANDARD DTSTART:20251102T010000 TZOFFSETFROM:-0400 TZOFFSETTO:-0500 RRULE:FREQ=YEARLY;BYDAY=1SU;BYMONTH=11 TZNAME:EST END:STANDARD END:VTIMEZONE BEGIN:VEVENT DTSTAMP:20250414T211930Z UID:DF9D92B9-A64B-4A3D-B1BF-07C3561685BB DTSTART;TZID=America/New_York:20250410T083000 DTEND;TZID=America/New_York:20250410T130000 DESCRIPTION:The main goal of this CAS seasonal school is to dive deep into the rapidly developing field of in-memory computing with a focus on Artifi cial intelligence (AI) and cover its cross-layer design challenges from de vice to algorithms. The IEEE Seasonal School in Circuits and Systems on In -Memory Computing (IMC 2025) offers talks and tutorials by leading researc hers from multiple disciplines and prominent universities and promotes stu dent short presentations to demonstrate new research and results\, discuss the potential and challenges of the in-memory accelerators\, future resea rch needs\, and directions\, and shape collaborations.\n\nFirst Talk Title (CAS DL Talk): Neuromorphic Computing: Bridging the gap between Nanoelect ronics\, Neuroscience and\nMachine Learning\n\nWhile research in designing AI algorithms has attained a stage where such platforms are able to outpe rform humans at several cognitive tasks\, an often-unnoticed cost is the h uge computational expenses required for running these algorithms in hardwa re. Recent explorations\nhave also revealed several algorithmic vulnerabil ities of deep learning systems like adversarial susceptibility\, lack of e xplainability\, and catastrophic forgetting\, to name a few. Brain-inspire d neuromorphic computing has the potential to overcome these challenges of current AI systems. This talk reviews recent developments in the domain o f neuromorphic computing from my group guided by an overarching system-sci ence perspective with an end-to-end co-design focus from computational neu roscience and machine learning to hardware and applications. From the top- down algorithm side\, I will delve into methodologies that treat neuromorp hic spiking architectures as continuously evolving dynamical systems\, rev ealing intriguing parallels with the learning dynamics in the brain. The m ethodologies discussed enable spiking architectures to transition beyond s imple vision-related tasks to complex sequence learning problems and large language model (LLM) architectures. Complimentary to this effort\, I will also elaborate on a bottom-up perspective of leveraging the intrinsic phy sics of emerging post-CMOS technologies like ferroelectrics and spintronic s to mimic several neuro-synaptic functionalities in novel device structur es operated at low terminal voltages. In-Memory computing architectures en abled by such neuromimetic devices have the potential of enabling two to t hree orders of magnitude energy efficiency in comparison to state-of-the-a rt CMOS implementations. I will outline several hardware-software co-desig n strategies to enable variation-aware\, robust\, self-healing neuromorphi c systems. I will conclude my talk with my vision of expanding the scope o f neuromorphic computing beyond simple neurons and synapses by forging str onger connections with computational neuroscience\, thereby enabling a new generation of brain-inspired computers.\n\nSecond Talk Title: Towards AI- Native Hardware Design\n\nIn this talk\, I will cover a body of work from NYU on democratizing and supercharging hardware design using modern AI/ML techniques\, from design specification to logic synthesis and early-state timing and routing congestion prediction. I will begin by describing Verig en and CL-Verilog\, the first specialized LLMs for automated Verilog code generation. To handle more complex designs\, we will discuss our recent wo rk on Chain-of-Thought approaches for hierarchical Verilog code generation and agentic frameworks to translate C code to HLS synthesizable C automat ically. Next\, I will discuss ABC-RL\, a state-RL method to optimize logic synthesis\, and VerilLoC\, an early-stage predictive model to identify co de blocks that can cause downstream timing closure issues. I will conclude by presenting my vision to build &quot\;end-to-end&quot\; foundation mode ls for hardware design.\n\nCo-sponsored by: IEEE North Jersey Section\n\nS peaker(s): Dr. Abhronil Sengupta\, Dr. Siddharth Garg \, \n\nAgenda: \nHyb rid Event\n\nEvent Time: 8:30 AM to 1:00 PM\n\n9:00-9:30 AM Registration a nd Networking\n\n9:30-9:35 AM Opening Remarks by Dr. Shaahin Angizi\, Vice -Chair\, IEEE CAS/ED Chapter\n\n9:35-9:40 AM Remark by Dr. Durga Misra\, C hair\, ECE Dept\, NJIT and Chair\, IEEE CAS/ED Chapter\n\n9:40-10:00 AM St udent Presentations (3-minute)\n\n10:00-11:00 AM Talk I: Dr. Abhronil Seng upta (Penn State University)\n\nTitle: Neuromorphic Computing: Bridging th e gap between Nanoelectronics\, Neuroscience and Machine Learning\n\n11:00 AM-12:00 PM Talk II: Dr. Siddharth Garg (New York University)\n\nTitle: T owards AI-Native Hardware Design\n\n12:00 PM - 12:05 PM Concluding Remarks by Dr. Shaahin Angizi\, Vice-Chair\, IEEE CAS/ED Chapter\n\n12:05 PM - 1: 00 PM Lunch & Networking and Discussion\n\nLocation: Eberhardt Hall\, Room 112\, New Jersey Institute of Technology\, Newark\, NJ\, USA\n\nOnline on Zoom\, Link: https://njit-edu.zoom.us/j/96664865749?pwd=pgm7ZY9IaeZGyBFJg dcy1Ey1XtCmlD.1\n\nMeeting ID: 966 6486 5749\nPasscode: 660738\n\nAll Welc ome: There is no fee/charge for attending IEEE technical seminar. You don' t have to be an IEEE Member to attend. Refreshments are free for all atten dees. Please invite your friends and colleagues to take advantage of this Invited Distinguished Lecture.\n\nRoom: Room 112\, Bldg: Eberhardt\, 154 S ummit Street\, Newark\, NJ 07102\, NJIT\, Newark\, New Jersey\, United Sta tes\, 07102\, Virtual: https://events.vtools.ieee.org/m/477163 LOCATION:Room: Room 112\, Bldg: Eberhardt\, 154 Summit Street\, Newark\, NJ 07102\, NJIT\, Newark\, New Jersey\, United States\, 07102\, Virtual: htt ps://events.vtools.ieee.org/m/477163 ORGANIZER:dmisra@njit.edu SEQUENCE:154 SUMMARY:IEEE Circuit and System (CAS) Seasonal School on In-Memory Computin g (IMC 2025) – (IMC 2024 Second Phase) URL;VALUE=URI:https://events.vtools.ieee.org/m/477163 X-ALT-DESC:Description: <br /><p class="MsoNormal">The main goal of this CA S seasonal school is to dive deep into the rapidly developing field of in- memory computing with a focus on Artificial intelligence (AI) and cover it s cross-layer design challenges from device to algorithms. The IEEE Season al School in Circuits and Systems on In-Memory Computing (IMC 2025) offers talks and tutorials by leading researchers from multiple disciplines and prominent universities and promotes student short presentations to demonst rate new research and results\, discuss the potential and challenges of th e in-memory accelerators\, future research needs\, and directions\, and sh ape collaborations.</p>\n<p class="MsoNormal"><strong>First Talk </strong> <strong>Title (CAS DL Talk)</strong>: Neuromorphic Computing: Bridging the gap between Nanoelectronics\, Neuroscience and<br>Machine Learning</p>\n< p>While research in designing AI algorithms has attained a stage where suc h platforms&nbsp\;are able to outperform humans at several cognitive tasks \, an often-unnoticed cost is the huge&nbsp\;computational expenses requir ed for running these algorithms in hardware. Recent explorations<br>have a lso revealed several algorithmic vulnerabilities of deep learning systems like adversarial susceptibility\, lack of explainability\, and catastrophi c forgetting\, to name a few. Brain-inspired neuromorphic computing has th e potential to overcome these challenges of current AI systems. This talk reviews recent developments in the domain of neuromorphic computing from m y group&nbsp\;guided by an overarching system-science perspective with an end-to-end co-design focus from computational neuroscience and machine lea rning to hardware and applications. From the top-down algorithm side\, I w ill delve into methodologies that treat neuromorphic spiking architectures as continuously evolving dynamical systems\, revealing intriguing paralle ls with the learning dynamics in the brain. The methodologies discussed en able spiking architectures to transition beyond simple vision-related task s to complex sequence learning problems and large language model (LLM) arc hitectures. Complimentary to this effort\, I will also elaborate on a bott om-up perspective of leveraging the intrinsic physics of emerging post-CMO S technologies like ferroelectrics and spintronics to mimic several neuro- synaptic functionalities in novel device structures operated at low termin al voltages. In-Memory computing architectures enabled by such neuromimeti c devices have the potential of enabling two to three orders of magnitude energy efficiency in comparison to state-of-the-art CMOS implementations. I will outline several hardware-software co-design strategies to enable va riation-aware\, robust\, self-healing neuromorphic systems. I will conclud e my talk with my vision of expanding the scope of neuromorphic computing beyond simple neurons and synapses by forging stronger connections with co mputational neuroscience\, thereby enabling a new generation of brain-insp ired&nbsp\;computers.</p>\n<p class="MsoNormal"><strong>Second Talk </stro ng><strong>Title</strong>: Towards AI-Native Hardware Design</p>\n<p class ="MsoNormal">In this talk\, I will cover a body of work from NYU on democr atizing and&nbsp\;supercharging hardware design using modern AI/ML techniq ues\, from design specification to&nbsp\;logic synthesis and early-state t iming and routing congestion prediction. I will begin by&nbsp\;describing Verigen and CL-Verilog\, the first specialized LLMs for automated Verilog code&nbsp\;generation. To handle more complex designs\, we will discuss ou r recent work on Chain-of-Thought approaches for hierarchical Verilog code generation and agentic frameworks to translate&nbsp\;C code to HLS synthe sizable C automatically. Next\, I will discuss ABC-RL\, a state-RL method& nbsp\;to optimize logic synthesis\, and VerilLoC\, an early-stage predicti ve model to identify code&nbsp\;blocks that can cause downstream timing cl osure issues. I will conclude by presenting my vision&nbsp\;to build &amp\ ;quot\;end-to-end&amp\;quot\; foundation models for hardware design.</p><b r /><br />Agenda: <br /><p>Hybrid Event</p>\n<p>Event Time: 8:30 AM to 1:0 0 PM</p>\n<p>9:00-9:30 AM Registration and Networking</p>\n<p>9:30-9:35 AM Opening Remarks by Dr. Shaahin Angizi\, Vice-Chair\, IEEE CAS/ED Chapter< /p>\n<p>9:35-9:40 AM Remark by Dr. Durga Misra\, Chair\, ECE Dept\, NJIT a nd Chair\, IEEE CAS/ED Chapter</p>\n<p><span style="font-family: -apple-sy stem\, BlinkMacSystemFont\, 'Segoe UI'\, Roboto\, Oxygen\, Ubuntu\, Cantar ell\, 'Open Sans'\, 'Helvetica Neue'\, sans-serif\;">9:40-10:00 A</span><s pan style="font-family: -apple-system\, BlinkMacSystemFont\, 'Segoe UI'\, Roboto\, Oxygen\, Ubuntu\, Cantarell\, 'Open Sans'\, 'Helvetica Neue'\, sa ns-serif\;">M Student Presentations (3-minute)</span></p>\n<p><span style= "font-family: -apple-system\, BlinkMacSystemFont\, 'Segoe UI'\, Roboto\, O xygen\, Ubuntu\, Cantarell\, 'Open Sans'\, 'Helvetica Neue'\, sans-serif\; ">10:00-11:00 AM </span><span style="font-family: -apple-system\, BlinkMac SystemFont\, 'Segoe UI'\, Roboto\, Oxygen\, Ubuntu\, Cantarell\, 'Open San s'\, 'Helvetica Neue'\, sans-serif\;"><strong><em><u>Talk I:</u></em></str ong> Dr. Abhronil Sengupta (Penn State University)</span></p>\n<p class="M soNormal"><strong>Title</strong>: Neuromorphic Computing: Bridging the gap between Nanoelectronics\, Neuroscience and Machine Learning</p>\n<p><span style="font-family: -apple-system\, BlinkMacSystemFont\, 'Segoe UI'\, Rob oto\, Oxygen\, Ubuntu\, Cantarell\, 'Open Sans'\, 'Helvetica Neue'\, sans- serif\;">11:00 AM-12:00 PM <strong><em><u>Talk II:</u></em></strong> Dr. S iddharth Garg (New York University)</span></p>\n<p class="MsoNormal"><stro ng>Title</strong>: Towards AI-Native Hardware Design</p>\n<p class="MsoNor mal">12:00 PM - 12:05 PM &nbsp\;Concluding Remarks by Dr. Shaahin Angizi\, Vice-Chair\, IEEE CAS/ED Chapter</p>\n<p class="MsoNormal">12:05 PM - 1:0 0 PM &nbsp\; Lunch &amp\; Networking and Discussion</p>\n<p class="MsoNorm al"><strong><em>Location: Eberhardt Hall\, Room 112\, New Jersey Institute of Technology\, Newark\, NJ\, USA</em></strong></p>\n<p class="MsoNormal" ><strong><em>Online on Zoom\, Link: <a href="https://njit-edu.zoom.us/j/96 664865749?pwd=pgm7ZY9IaeZGyBFJgdcy1Ey1XtCmlD.1" target="_blank" rel="noope ner" data-saferedirecturl="https://www.google.com/url?q=https://njit-edu.z oom.us/j/96664865749?pwd%3Dpgm7ZY9IaeZGyBFJgdcy1Ey1XtCmlD.1&amp\;source=gm ail&amp\;ust=1743023465502000&amp\;usg=AOvVaw04BpCKFlXqv74TCGrdZtTy">https ://njit-edu.zoom.us/j/<wbr>96664865749?pwd=<wbr>pgm7ZY9IaeZGyBFJgdcy1Ey1Xt CmlD<wbr>.1</a></em></strong></p>\n<p class="MsoNormal"><strong><em>Meetin g ID: 966 6486 5749<br>Passcode: 660738</em></strong></p>\n<p><span style= "font-family: -apple-system\, BlinkMacSystemFont\, 'Segoe UI'\, Roboto\, O xygen\, Ubuntu\, Cantarell\, 'Open Sans'\, 'Helvetica Neue'\, sans-serif\; ">All Welcome: There is no fee/charge for attending IEEE technical seminar . You don't have to be an IEEE Member to attend. Refreshments are free for all attendees. Please invite your friends and colleagues to take advantag e of this Invited Distinguished Lecture.</span></p> END:VEVENT END:VCALENDAR