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VERSION:2.0
PRODID:IEEE vTools.Events//EN
CALSCALE:GREGORIAN
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TZID:Canada/Eastern
BEGIN:DAYLIGHT
DTSTART:20180311T030000
TZOFFSETFROM:-0500
TZOFFSETTO:-0400
RRULE:FREQ=YEARLY;BYDAY=2SU;BYMONTH=3
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BEGIN:STANDARD
DTSTART:20171105T010000
TZOFFSETFROM:-0400
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RRULE:FREQ=YEARLY;BYDAY=1SU;BYMONTH=11
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BEGIN:VEVENT
DTSTAMP:20180321T185919Z
UID:C00D6E43-C564-11E7-A02F-0050568D7F66
DTSTART;TZID=Canada/Eastern:20171117T100000
DTEND;TZID=Canada/Eastern:20171117T120000
DESCRIPTION:Soft errors have long plagued the semiconductor field\, first s
 howing up in space applications and later in terrestrial applications. Tec
 hnology scaling and low-voltage/low-power requirements are further exacerb
 ating the occurrence of soft errors in nano-scale circuits. A soft error o
 ccurs when charge generated by energetic particles is collected by reverse
 -biased junctions. In this talk\, we will review the background and highli
 ght recent research done at the University of Waterloo on circuit techniqu
 es to mitigate soft errors.\n\nSpeaker(s): Manoj Sachdev\, \n\nRoom: 3000\
 , Bldg: CEI Building\,  University of Windsor\, windsor\, Ontario\, Canada
 \, N9B3P1
LOCATION:Room: 3000\, Bldg: CEI Building\,  University of Windsor\, windsor
 \, Ontario\, Canada\, N9B3P1
ORGANIZER:eshaghi@ieee.org
SEQUENCE:1
SUMMARY:Radiation Hardened CMOS Circuits
URL;VALUE=URI:https://events.vtools.ieee.org/m/48348
X-ALT-DESC:Description: &lt;br /&gt;&lt;p&gt;Soft errors have long plagued the semicond
 uctor field\, first showing up in space applications and later in terrestr
 ial applications. Technology scaling and low-voltage/low-power requirement
 s are further exacerbating the occurrence of soft errors in nano-scale cir
 cuits.&amp;nbsp\; A soft error occurs when charge generated by energetic parti
 cles is collected by reverse-biased junctions. In this talk\, we will revi
 ew the background and highlight recent research done at the University of 
 Waterloo on circuit techniques to mitigate soft errors.&lt;/p&gt;
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