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UID:1F85FCE3-99FB-41DB-B1EF-142087087081
DTSTART;TZID=America/New_York:20250527T183000
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DESCRIPTION:Hardware implementations of artificial neural networks (ANNs)
 —the most advanced of which are made of millions of electronic neurons i
 nterconnected by hundreds of millions of electronic synapses—have achiev
 ed higher energy efficiency than classical computers in some small-scale d
 ata-intensive computing tasks. State-of-the-art neuromorphic computers\, s
 uch as Intel’s Loihi or IBM’s NorthPole\, implement ANNs using bio-ins
 pired neuron- and synapse-mimicking circuits made of complementary metal
 –oxide–semiconductor (CMOS) transistors\, at least 18 per neuron and s
 ix per synapse. Simplifying the structure and size of these two building b
 locks would enable the construction of more sophisticated\, larger and mor
 e energy-efficient ANNs.\n\nIn this talk\, Prof. Mario Lanza\, IEEE Fellow
  and IEEE Electron Devices Society Distinguished Lecturer\, will explain h
 ow a single CMOS transistor can exhibit neural and synaptic behaviors if i
 t is biased in a specific (unconventional) manner. By connecting one addit
 ional CMOS transistor in series\, we build a versatile 2-transistor-cell t
 hat exhibits adjustable neuro-synaptic response (which we named neuro-syna
 ptic random access memory cell\, or NS-RAM cell). This electronic performa
 nce comes with a yield of 100% and an ultra-low device-to-device variabili
 ty\, owing to the maturity of the silicon CMOS platform used—no material
 s or devices alien to the CMOS process are required. These results represe
 nt a short-term solution for the implementation of efficient ANNs and an o
 pportunity in terms of CMOS circuit design and optimization for artificial
  intelligence applications. The MOSFET transistor keep surprising us and n
 ow—after this study—it seems to be the perfect building block for impl
 ementing ANNs.\n\nSpeaker(s): Dr. Mario Lanza\n\nVirtual: https://events.v
 tools.ieee.org/m/484279
LOCATION:Virtual: https://events.vtools.ieee.org/m/484279
ORGANIZER:murtyp@ieee.org
SEQUENCE:33
SUMMARY:Synaptic and Neural Behaviors in a Standard Silicon Transistor
URL;VALUE=URI:https://events.vtools.ieee.org/m/484279
X-ALT-DESC:Description: <br /><p class="MsoNormal"><span lang="EN-GB">Hardw
 are implementations of artificial neural networks (ANNs)&mdash\;the most a
 dvanced of which are made of millions of electronic neurons interconnected
  by hundreds of millions of electronic synapses&mdash\;have achieved highe
 r energy efficiency than classical computers in some small-scale data-inte
 nsive computing tasks. State-of-the-art neuromorphic computers\, such as I
 ntel&rsquo\;s Loihi or IBM&rsquo\;s NorthPole\, implement ANNs using bio-i
 nspired neuron- and synapse-mimicking circuits made of complementary metal
 &ndash\;oxide&ndash\;semiconductor (CMOS) transistors\, at least 18 per ne
 uron and six per synapse. Simplifying the structure and size of these two 
 building blocks would enable the construction of more sophisticated\, larg
 er and more energy-efficient ANNs. </span></p>\n<p class="MsoNormal"><span
  lang="EN-GB">In this talk\, Prof. Mario Lanza\, IEEE Fellow and IEEE Elec
 tron Devices Society Distinguished Lecturer\, &nbsp\;will explain how a si
 ngle CMOS transistor can exhibit neural and synaptic behaviors if it is bi
 ased in a specific (unconventional) manner. By connecting one additional C
 MOS transistor in series\, we build a versatile 2-transistor-cell that exh
 ibits adjustable neuro-synaptic response (which we named neuro-synaptic ra
 ndom access memory cell\, or NS-RAM cell). This electronic performance com
 es with a yield of 100% and an ultra-low device-to-device variability\, ow
 ing to the maturity of the silicon CMOS platform used&mdash\;no materials 
 or devices alien to the CMOS process are required. These results represent
  a short-term solution for the implementation of efficient ANNs and an opp
 ortunity in terms of CMOS circuit design and optimization for artificial i
 ntelligence applications. The MOSFET transistor keep surprising us and now
 &mdash\;after this study&mdash\;it seems to be the perfect building block 
 for implementing ANNs.</span></p>
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