BEGIN:VCALENDAR VERSION:2.0 PRODID:IEEE vTools.Events//EN CALSCALE:GREGORIAN BEGIN:VTIMEZONE TZID:Europe/Prague BEGIN:DAYLIGHT DTSTART:20250330T030000 TZOFFSETFROM:+0100 TZOFFSETTO:+0200 RRULE:FREQ=YEARLY;BYDAY=-1SU;BYMONTH=3 TZNAME:CEST END:DAYLIGHT BEGIN:STANDARD DTSTART:20251026T020000 TZOFFSETFROM:+0200 TZOFFSETTO:+0100 RRULE:FREQ=YEARLY;BYDAY=-1SU;BYMONTH=10 TZNAME:CET END:STANDARD END:VTIMEZONE BEGIN:VEVENT DTSTAMP:20250629T143748Z UID:ADF6C723-C8CA-4477-B06E-703C69F81C65 DTSTART;TZID=Europe/Prague:20250626T133000 DTEND;TZID=Europe/Prague:20250628T133000 DESCRIPTION:Background\n\nThe Prague Embedded Systems Workshop is an annual research meeting intended for the presentation and discussion of students ’ results and progress in all aspects of embedded systems design\, testi ng\, communications\, and applications. It will be traditionally organized by the Department of Digital Design at the Faculty of Information Technol ogy of the Czech Technical University in Prague. The workshop aims to enha nce collaboration between different universities\, not only inside the EU. It will be based on oral presentations\, mutual communication\, and discu ssions.\n\nA part of the PESW workshop is a contest of bachelor and master theses organized as a poster session and awarded by sponsors gifts. The m ain aim is a motivation for future Ph.D. studies.\n\nScope\n\nThe PESW wor kshop addresses emerging issues\, hot problems\, new solution methods\, an d their hardware and software implementations in the fields of digital and mixed-signal system design. It is especially focused on dependable and lo w power design\, and testing methods related to the SoC technology and mod ern embedded applications. The workshop topics include (but are not limite d to):\n\n- Programmable/re-configurable/adaptable architectures\n- SoC an d NoC design and testing\n- Digital design optimization methods\, logic sy nthesis and optimization\n- Architectures and hardware for security applic ations\n- On-line and off-line error detection and correction\n- Fault-tol erant systems design methods\, testability and reliability analysis\n- Dia gnosis\, testing\, and verification of embedded systems\n- Mission-critica l and real-time systems\n- Heterogeneous Cyber-Physical Systems\, robotic control\n- Analog\, mixed-mode\, and physical synthesis and optimization\n - Artificial intelligence\, machine learning\, neural networks\n- Applicat ions of (embedded) digital systems\n- Embedded HCI\n\nSpecial Session on E mbedded Security\n\n- Side-channel attacks and countermeasures\n- Security of pervasive devices\n- Efficient implementation of cryptographic schemes \n- Post-quantum cryptography\n\nSubmission & Types of Papers\n\nThere wil l be three types of submissions at PESW 2025:\n\n- Full papers (up to 10 p ages\, single-column) describing the student's original research. These pa pers will undergo a standard reviewing process and if accepted\, they will be included in the proceedings with ISBN.\n- Abstracts (up to four pages\ , single-column) of author's earlier published and successfully presented papers (at conferences\, journals\, etc.). These contributions will not be reviewed\; emphasis will be put on the presentation and discussion. These abstracts will be included in the proceedings with ISBN.\n- Student poste rs - abstracts of defended Bc. and MSc. Theses with subsequent poster pres entation. These abstracts will not be included in the Proceedings.\n\nPESW 2025 Student Poster Session\n\nThe objective of the Student Poster Sessio n at the PESW Workshop is to provide a forum for the presentation of stude nt works defended this or in the last year (since summer 2024). The presen ted works must be Bachelor or Master Theses from the field of Embedded Sys tems.\n\nAs the session is organized by young IEEE members\, the second ob jective is to encourage the participants to enter the international profes sional community.\n\nThe Poster Session is organized by the IEEE Student B ranch at the Czech Technical University in Prague in connection with IEEE Young Professionals. Best posters will be rewarded by valuable prizes dona ted by IEEE YP and sponsors.\n\nCentrum Mariapoli\, Mladoboleslavská 667\ , Praha 9 – Vinoř\, Czech Republic\, Czech Republic\, 190 17 LOCATION:Centrum Mariapoli\, Mladoboleslavská 667\, Praha 9 – Vinoř\, C zech Republic\, Czech Republic\, 190 17 ORGANIZER:fiserp@fit.cvut.cz SEQUENCE:48 SUMMARY:The 13th Prague Embedded Systems Workshop URL;VALUE=URI:https://events.vtools.ieee.org/m/489248 X-ALT-DESC:Description: <br /><h3>Background</h3>\n<p>The Prague Embedded S ystems Workshop is an annual research meeting intended for&nbsp\;the prese ntation and discussion of students&rsquo\; results and progress in all asp ects of&nbsp\;embedded systems design\, testing\, communications\, and app lications. It will be traditionally organized by the Department of Digital Design at the Faculty of&nbsp\;Information Technology of the Czech Techni cal University in Prague. The workshop aims to enhance collaboration betwe en different universities\, not only inside the EU. It will be based on or al presentations\, mutual communication\, and discussions.</p>\n<p>A part of the PESW workshop is a contest of bachelor and master theses organized as a poster session and awarded by sponsors gifts. The main aim is a motiv ation for future Ph.D. studies.</p>\n<h3>Scope</h3>\n<p>The PESW workshop addresses emerging issues\, hot problems\, new solution methods\, and thei r hardware and software implementations in the fields of digital and mixed -signal system design. It is especially focused on dependable and low powe r design\, and testing methods related to the SoC technology and modern em bedded applications. The workshop topics include (but are not limited to): </p>\n<ul>\n<li>Programmable/re-configurable/adaptable architectures</li>\ n<li>SoC and NoC design and testing</li>\n<li>Digital design optimization methods\, logic synthesis and optimization</li>\n<li>Architectures and har dware for security applications</li>\n<li>On-line and off-line error detec tion and correction</li>\n<li>Fault-tolerant systems design methods\, test ability and reliability analysis</li>\n<li>Diagnosis\, testing\, and verif ication of embedded systems</li>\n<li>Mission-critical and real-time syste ms</li>\n<li>Heterogeneous Cyber-Physical Systems\, robotic control</li>\n <li>Analog\, mixed-mode\, and physical synthesis and optimization</li>\n<l i>Artificial intelligence\, machine learning\, neural networks</li>\n<li>A pplications of (embedded) digital systems</li>\n<li>Embedded HCI</li>\n</u l>\n<h2>Special Session on Embedded Security</h2>\n<ul>\n<li>Side-channel attacks and countermeasures</li>\n<li>Security of pervasive devices</li>\n <li>Efficient implementation of cryptographic schemes</li>\n<li>Post-quant um cryptography</li>\n</ul>\n<h3>Submission &amp\; Types of Papers</h3>\n< p>There will be three types of submissions at PESW 2025:</p>\n<ul>\n<li><s trong>Full papers</strong>&nbsp\;(up to 10 pages\, single-column) describi ng the student's original research. These papers&nbsp\;<em>will undergo</e m>&nbsp\;a standard reviewing process and if accepted\, they will be inclu ded in the proceedings with ISBN.</li>\n<li><strong>Abstracts</strong>&nbs p\;(up to four pages\, single-column) of author's earlier published and su ccessfully presented papers (at&nbsp\;conferences\, journals\, etc.). Thes e contributions&nbsp\;<em>will not be reviewed</em>\; emphasis will be put on the presentation and discussion. These abstracts will be included in t he proceedings with ISBN.</li>\n<li><strong>Student posters</strong>&nbsp\ ;- abstracts of defended Bc. and MSc. Theses with subsequent poster presen tation. These abstracts&nbsp\;<em>will not be included</em> in the Proceed ings.</li>\n</ul>\n<h2>PESW 2025 Student Poster Session</h2>\n<p>The objec tive of the Student Poster Session at the PESW Workshop is to provide a fo rum for the presentation of student works defended this or in the last yea r (since summer 2024). The presented works must be Bachelor or Master Thes es from the field of Embedded Systems.</p>\n<p>As the session is organized by young IEEE members\, the second objective is to encourage the particip ants to enter the international professional community.</p>\n<p>The Poster Session is organized by the IEEE Student Branch at the Czech Technical Un iversity in Prague in connection with IEEE Young Professionals. Best poste rs will be rewarded by valuable prizes donated by IEEE YP and sponsors.</p > END:VEVENT END:VCALENDAR