BEGIN:VCALENDAR
VERSION:2.0
PRODID:IEEE vTools.Events//EN
CALSCALE:GREGORIAN
BEGIN:VTIMEZONE
TZID:Asia/Kolkata
BEGIN:STANDARD
DTSTART:19451014T230000
TZOFFSETFROM:+0630
TZOFFSETTO:+0530
TZNAME:IST
END:STANDARD
END:VTIMEZONE
BEGIN:VEVENT
DTSTAMP:20250619T144208Z
UID:99085E80-4634-43BA-B388-9D5E09F0CEC2
DTSTART;TZID=Asia/Kolkata:20250609T090000
DTEND;TZID=Asia/Kolkata:20250613T170000
DESCRIPTION:Celebration of Golden Jubilee – IEEE Delhi Section\nFaculty D
 evelopment Programme (FDP) on VLSI Design\n\nChief Guest and Distinguished
  Resource Persons:\n\n-\nMr. V.K. Sharma\, Scientist-G &amp; Director\, CDAC M
 ohali – Chief Guest\n\n-\nProf. Rajendra Singh\, Department of Physics\,
  IIT Delhi – Resource Person\n\n-\nProf. Sudeb Dasgupta\, Department of 
 ECE\, IIT Roorkee – Resource Person\n\n-\nDr. Balwinder Singh\, Scientis
 t-E\, CI\, E&amp;ICT Academy\, CDAC Mohali – Guest of Eminence &amp; Resource Pe
 rson\n\n-\nProf. Manoj Saxena\, Department of Electronics\, University of 
 Delhi – Guest of Honor &amp; Resource Person\n\n-\nMr. Harpreet S. Jatana\, 
 Former Group Head\, SCL Mohali &amp; ISRO – Resource Person\n\nThe Faculty D
 evelopment Programme (FDP) marking the Golden Jubilee celebrations of the 
 IEEE Delhi Section was formally inaugurated on June 9\, 2025\, by Mr. V.K.
  Sharma\, Scientist-G and Director at CDAC Mohali\, who graced the occasio
 n as the Chief Guest.\n\nDr. Manoj Saxena from the University of Delhi and
  Dr. Balwinder Singh from CDAC Mohali participated as Guest of Honor and G
 uest of Eminence\, respectively.\n\nIn his inaugural address\, Mr. Sharma 
 underlined the strategic importance of VLSI (Very-Large-Scale Integration)
  design amid India&#39;s growing ambitions in the semiconductor sector. He ela
 borated on various national initiatives aimed at achieving self-reliance i
 n chip design and fabrication\, aligning with the country’s vision for t
 echnological advancement.\n\nHe stressed the necessity for academic-indust
 ry collaboration to foster innovation\, skill development\, and practical 
 knowledge-sharing. His remarks served as a source of inspiration\, emphasi
 zing the pivotal role of engineering education and research in shaping a f
 uture-ready semiconductor workforce.\n\nThe FDP brought together leading a
 cademicians\, scientists\, and industry experts to share knowledge and adv
 ancements in VLSI technology\, offering a valuable platform for learning\,
  collaboration\, and innovation.\n\nRoom: Audtorium\, Bldg: Academic Block
 \, Jaypee University Of Information Technology\, Solan\, Himachal Pradesh\
 , India\, 173234
LOCATION:Room: Audtorium\, Bldg: Academic Block\, Jaypee University Of Info
 rmation Technology\, Solan\, Himachal Pradesh\, India\, 173234
ORGANIZER:ieee.juit@juitsolan.in
SEQUENCE:2
SUMMARY:VLSI DESIGN: BRIDGING THEORY AND PRACTICE
URL;VALUE=URI:https://events.vtools.ieee.org/m/489711
X-ALT-DESC:Description: &lt;br /&gt;&lt;p class=&quot;MsoNormal&quot; style=&quot;text-align: cente
 r\;&quot; align=&quot;center&quot;&gt;&amp;nbsp\;&lt;/p&gt;\n&lt;p class=&quot;MsoNormal&quot; style=&quot;text-align: c
 enter\;&quot; align=&quot;center&quot;&gt;&amp;nbsp\;&lt;/p&gt;\n&lt;p class=&quot;MsoNormal&quot; style=&quot;text-alig
 n: center\;&quot; align=&quot;center&quot;&gt;&lt;strong style=&quot;mso-bidi-font-weight: normal\;&quot;
 &gt;&lt;span lang=&quot;EN-US&quot; style=&quot;font-size: 12.0pt\; line-height: 115%\; font-fa
 mily: &#39;Times New Roman&#39;\,&#39;serif&#39;\; mso-fareast-font-family: TimesNewRomanP
 SMT\;&quot;&gt;&lt;img src=&quot;https://events.vtools.ieee.org/vtools_ui/media/display/c6
 1d004d-bd12-495b-91e6-0902b7bf4343&quot; width=&quot;215&quot; height=&quot;121&quot;&gt;&lt;/span&gt;&lt;/stro
 ng&gt;&lt;/p&gt;\n&lt;p data-start=&quot;135&quot; data-end=&quot;246&quot;&gt;&lt;strong data-start=&quot;135&quot; data-
 end=&quot;189&quot;&gt;Celebration of Golden Jubilee &amp;ndash\; IEEE Delhi Section&lt;/stron
 g&gt;&lt;br data-start=&quot;189&quot; data-end=&quot;192&quot;&gt;&lt;strong data-start=&quot;192&quot; data-end=&quot;2
 46&quot;&gt;Faculty Development Programme (FDP) on VLSI Design&lt;/strong&gt;&lt;/p&gt;\n&lt;p da
 ta-start=&quot;248&quot; data-end=&quot;299&quot;&gt;&lt;strong data-start=&quot;248&quot; data-end=&quot;299&quot;&gt;Chie
 f Guest and Distinguished Resource Persons:&lt;/strong&gt;&lt;/p&gt;\n&lt;ol data-start=&quot;
 301&quot; data-end=&quot;859&quot;&gt;\n&lt;li data-start=&quot;301&quot; data-end=&quot;378&quot;&gt;\n&lt;p data-start=
 &quot;304&quot; data-end=&quot;378&quot;&gt;&lt;strong data-start=&quot;304&quot; data-end=&quot;323&quot;&gt;Mr. V.K. Shar
 ma&lt;/strong&gt;\, Scientist-G &amp;amp\; Director\, CDAC Mohali &amp;ndash\; &lt;em data-
 start=&quot;363&quot; data-end=&quot;376&quot;&gt;Chief Guest&lt;/em&gt;&lt;/p&gt;\n&lt;/li&gt;\n&lt;li data-start=&quot;37
 9&quot; data-end=&quot;462&quot;&gt;\n&lt;p data-start=&quot;382&quot; data-end=&quot;462&quot;&gt;&lt;strong data-start=
 &quot;382&quot; data-end=&quot;406&quot;&gt;Prof. Rajendra Singh&lt;/strong&gt;\, Department of Physics
 \, IIT Delhi &amp;ndash\; &lt;em data-start=&quot;443&quot; data-end=&quot;460&quot;&gt;Resource Person&lt;
 /em&gt;&lt;/p&gt;\n&lt;/li&gt;\n&lt;li data-start=&quot;463&quot; data-end=&quot;544&quot;&gt;\n&lt;p data-start=&quot;466&quot;
  data-end=&quot;544&quot;&gt;&lt;strong data-start=&quot;466&quot; data-end=&quot;490&quot;&gt;Prof. Sudeb Dasgup
 ta&lt;/strong&gt;\, Department of ECE\, IIT Roorkee &amp;ndash\; &lt;em data-start=&quot;525
 &quot; data-end=&quot;542&quot;&gt;Resource Person&lt;/em&gt;&lt;/p&gt;\n&lt;/li&gt;\n&lt;li data-start=&quot;545&quot; dat
 a-end=&quot;658&quot;&gt;\n&lt;p data-start=&quot;548&quot; data-end=&quot;658&quot;&gt;&lt;strong data-start=&quot;548&quot; 
 data-end=&quot;571&quot;&gt;Dr. Balwinder Singh&lt;/strong&gt;\, Scientist-E\, CI\, E&amp;amp\;IC
 T Academy\, CDAC Mohali &amp;ndash\; &lt;em data-start=&quot;619&quot; data-end=&quot;656&quot;&gt;Guest
  of Eminence &amp;amp\; Resource Person&lt;/em&gt;&lt;/p&gt;\n&lt;/li&gt;\n&lt;li data-start=&quot;659&quot; 
 data-end=&quot;771&quot;&gt;\n&lt;p data-start=&quot;662&quot; data-end=&quot;771&quot;&gt;&lt;strong data-start=&quot;66
 2&quot; data-end=&quot;684&quot;&gt;Prof. Manoj Saxena&lt;/strong&gt;\, Department of Electronics\
 , University of Delhi &amp;ndash\; &lt;em data-start=&quot;735&quot; data-end=&quot;769&quot;&gt;Guest o
 f Honor &amp;amp\; Resource Person&lt;/em&gt;&lt;/p&gt;\n&lt;/li&gt;\n&lt;li data-start=&quot;772&quot; data-
 end=&quot;859&quot;&gt;\n&lt;p data-start=&quot;775&quot; data-end=&quot;859&quot;&gt;&lt;strong data-start=&quot;775&quot; da
 ta-end=&quot;801&quot;&gt;Mr. Harpreet S. Jatana&lt;/strong&gt;\, Former Group Head\, SCL Moh
 ali &amp;amp\; ISRO &amp;ndash\; &lt;em data-start=&quot;842&quot; data-end=&quot;859&quot;&gt;Resource Pers
 on&lt;/em&gt;&lt;/p&gt;\n&lt;/li&gt;\n&lt;/ol&gt;\n&lt;p data-start=&quot;861&quot; data-end=&quot;1127&quot;&gt;The Faculty
  Development Programme (FDP) marking the Golden Jubilee celebrations of th
 e IEEE Delhi Section was formally inaugurated on &lt;strong data-start=&quot;995&quot; 
 data-end=&quot;1011&quot;&gt;June 9\, 2025&lt;/strong&gt;\, by &lt;strong data-start=&quot;1016&quot; data
 -end=&quot;1035&quot;&gt;Mr. V.K. Sharma&lt;/strong&gt;\, Scientist-G and Director at &lt;strong
  data-start=&quot;1065&quot; data-end=&quot;1080&quot;&gt;CDAC Mohali&lt;/strong&gt;\, who graced the o
 ccasion as the &lt;em data-start=&quot;1113&quot; data-end=&quot;1126&quot;&gt;Chief Guest&lt;/em&gt;.&lt;/p&gt;
 \n&lt;p data-start=&quot;1129&quot; data-end=&quot;1297&quot;&gt;&lt;strong data-start=&quot;1129&quot; data-end=
 &quot;1149&quot;&gt;Dr. Manoj Saxena&lt;/strong&gt; from the University of Delhi and &lt;strong 
 data-start=&quot;1183&quot; data-end=&quot;1206&quot;&gt;Dr. Balwinder Singh&lt;/strong&gt; from CDAC M
 ohali participated as &lt;em data-start=&quot;1240&quot; data-end=&quot;1256&quot;&gt;Guest of Honor
 &lt;/em&gt; and &lt;em data-start=&quot;1261&quot; data-end=&quot;1280&quot;&gt;Guest of Eminence&lt;/em&gt;\, r
 espectively.&lt;/p&gt;\n&lt;p data-start=&quot;1299&quot; data-end=&quot;1676&quot;&gt;In his inaugural ad
 dress\, &lt;strong data-start=&quot;1325&quot; data-end=&quot;1339&quot;&gt;Mr. Sharma&lt;/strong&gt; unde
 rlined the strategic importance of &lt;strong data-start=&quot;1379&quot; data-end=&quot;142
 5&quot;&gt;VLSI (Very-Large-Scale Integration) design&lt;/strong&gt; amid India&#39;s growin
 g ambitions in the &lt;strong data-start=&quot;1464&quot; data-end=&quot;1488&quot;&gt;semiconductor
  sector&lt;/strong&gt;. He elaborated on various &lt;strong data-start=&quot;1515&quot; data-
 end=&quot;1539&quot;&gt;national initiatives&lt;/strong&gt; aimed at achieving &lt;strong data-s
 tart=&quot;1559&quot; data-end=&quot;1576&quot;&gt;self-reliance&lt;/strong&gt; in chip design and fabr
 ication\, aligning with the country&amp;rsquo\;s vision for technological adva
 ncement.&lt;/p&gt;\n&lt;p data-start=&quot;1678&quot; data-end=&quot;1984&quot;&gt;He stressed the necessi
 ty for &lt;strong data-start=&quot;1708&quot; data-end=&quot;1743&quot;&gt;academic-industry collabo
 ration&lt;/strong&gt; to foster innovation\, skill development\, and practical k
 nowledge-sharing. His remarks served as a source of inspiration\, emphasiz
 ing the pivotal role of engineering education and research in shaping a fu
 ture-ready semiconductor workforce.&lt;/p&gt;\n&lt;p data-start=&quot;1986&quot; data-end=&quot;21
 95&quot;&gt;The FDP brought together leading academicians\, scientists\, and indus
 try experts to share knowledge and advancements in VLSI technology\, offer
 ing a valuable platform for learning\, collaboration\, and innovation.&lt;/p&gt;
 \n&lt;p class=&quot;MsoNormal&quot; style=&quot;margin-bottom: .0001pt\; text-align: justify
 \; mso-layout-grid-align: none\; text-autospace: none\;&quot;&gt;&lt;span lang=&quot;EN-US
 &quot; style=&quot;font-size: 12.0pt\; line-height: 115%\; font-family: &#39;Times New R
 oman&#39;\,&#39;serif&#39;\; mso-fareast-font-family: TimesNewRomanPSMT\;&quot;&gt;&amp;nbsp\;&lt;/sp
 an&gt;&lt;span style=&quot;font-size: 12.0pt\; line-height: 115%\; font-family: &#39;Time
 s New Roman&#39;\,&#39;serif&#39;\; mso-fareast-font-family: TimesNewRomanPSMT\; mso-a
 nsi-language: EN-IN\; mso-fareast-language: EN-IN\; mso-bidi-language: HI\
 ; mso-no-proof: yes\;&quot;&gt;&lt;img src=&quot;https://events.vtools.ieee.org/vtools_ui/
 media/display/c9a3acac-f01f-4ed7-963b-1ce2ac905fad&quot; width=&quot;134&quot; height=&quot;19
 0&quot;&gt;&lt;!--[endif]--&gt;&lt;/span&gt;&lt;/p&gt;\n&lt;p class=&quot;MsoNormal&quot; style=&quot;margin-bottom: .
 0001pt\; text-align: justify\; mso-layout-grid-align: none\; text-autospac
 e: none\;&quot;&gt;&lt;span lang=&quot;EN-US&quot; style=&quot;font-size: 12.0pt\; line-height: 115%
 \; font-family: &#39;Times New Roman&#39;\,&#39;serif&#39;\; mso-fareast-font-family: Time
 sNewRomanPSMT\;&quot;&gt;&lt;img src=&quot;https://events.vtools.ieee.org/vtools_ui/media/
 display/3cff64d7-a213-4b52-a505-e4b8790694f7&quot; width=&quot;104&quot; height=&quot;149&quot;&gt; &amp;n
 bsp\;&lt;img src=&quot;https://events.vtools.ieee.org/vtools_ui/media/display/c2e5
 c4b1-cdbb-498f-9427-475b08f0da7c&quot; width=&quot;260&quot; height=&quot;146&quot;&gt;&lt;/span&gt;&lt;/p&gt;
END:VEVENT
END:VCALENDAR