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DTSTART:20250330T030000
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DTSTAMP:20250717T082746Z
UID:4335954B-D132-4E40-BA25-F88FA690A6F8
DTSTART;TZID=Europe/Amsterdam:20250714T110000
DTEND;TZID=Europe/Amsterdam:20250714T123000
DESCRIPTION:The IEEE Spain Chapter CASS-SSCS is pleased to announce the tal
 k “Efficient Computing for AI and Robotics: From Hardware Accelerators t
 o Algorithm Design” that will take place next July 14th at 11am in the C
 ampus Nord of the Universitat Politècnica de Catalunya. This talk is spon
 sored by the IEEE Solid-State Circuits Society Distinguished Lecturer Prog
 ram.\n\nSpeaker(s): Vivienne Sze\, \n\nRoom: Aula de Teleensenyament\, Bld
 g: Edifici B3\, jordi Girona\, 1-3\, Campus Nord UPC\, Barcelona\, Catalun
 a\, Spain\, 08034\, Virtual: https://events.vtools.ieee.org/m/490505
LOCATION:Room: Aula de Teleensenyament\, Bldg: Edifici B3\, jordi Girona\, 
 1-3\, Campus Nord UPC\, Barcelona\, Cataluna\, Spain\, 08034\, Virtual: ht
 tps://events.vtools.ieee.org/m/490505
ORGANIZER:francesc.moll@upc.edu
SEQUENCE:43
SUMMARY:DLP SSCS Vivienne Sze - Efficient Computing for AI and Robotics: Fr
 om Hardware Accelerators to Algorithm Design
URL;VALUE=URI:https://events.vtools.ieee.org/m/490505
X-ALT-DESC:Description: <br /><p id="docs-internal-guid-2bd7535e-7fff-2120-
 ded1-885f2ecffc8c" dir="ltr" style="line-height: 1.38\; margin-top: 0pt\; 
 margin-bottom: 0pt\;"><span style="font-size: 11pt\; font-family: Arial\,s
 ans-serif\; color: #000000\; background-color: transparent\; font-weight: 
 400\; font-style: normal\; font-variant: normal\; text-decoration: none\; 
 vertical-align: baseline\; white-space: pre-wrap\;">The IEEE Spain Chapter
  CASS-SSCS is pleased to announce the talk &ldquo\;</span><span style="fon
 t-size: 11pt\; font-family: Arial\,sans-serif\; color: #000000\; backgroun
 d-color: transparent\; font-weight: bold\; font-style: normal\; font-varia
 nt: normal\; text-decoration: none\; vertical-align: baseline\; white-spac
 e: pre-wrap\;">Efficient Computing for AI and Robotics: From Hardware Acce
 lerators to Algorithm Design</span><span style="font-size: 11pt\; font-fam
 ily: Arial\,sans-serif\; color: #000000\; background-color: transparent\; 
 font-weight: 400\; font-style: normal\; font-variant: normal\; text-decora
 tion: none\; vertical-align: baseline\; white-space: pre-wrap\;">&rdquo\; 
 that will take place next July 14th at 11am in the Campus Nord of the Univ
 ersitat Polit&egrave\;cnica de Catalunya. This talk is sponsored by the IE
 EE Solid-State Circuits Society Distinguished Lecturer Program.</span></p>
END:VEVENT
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