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DTSTAMP:20250912T202401Z
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DTSTART;TZID=America/Chicago:20250911T140000
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DESCRIPTION:Since its inception in late 1980s\, innovations in NAND flash h
 ave enabled massive growth in bit density along with better performance an
 d significant cost reduction. This has made NAND Flash the choice of stora
 ge media as the Artificial Intelligence (AI) models continue to grow. As t
 he AI era applications expand in scope\, NAND FLASH faces new market oppor
 tunities and scaling challenges. Due to the demand for efficient and high-
 performance memory solutions\, the push to keep NAND on a sustainable scal
 ing path has never been stronger. This talk will review technology advance
 s in material\, process\, device and design that have fueled the NAND scal
 ing in 2D as well as 3D era. Several technology proposals to overcome the 
 cost-performance trade-off of layer stacking are covered that will pave th
 e path for continue cell scaling with gate all around (GAA) architecture.\
 n\nCo-sponsored by: Electronic Materials Committee - IEEE Electron Devices
  Society\n\nSpeaker(s): Dr.  Shyam Surthi\, \n\nRoom: INGRAM ROOM 3207\, B
 ldg: INGR\, Ingram School of Engineering\, 327 W Woods Street\, San Marcos
 \, Texas\, United States\, 78666\, Virtual: https://events.vtools.ieee.org
 /m/500151
LOCATION:Room: INGRAM ROOM 3207\, Bldg: INGR\, Ingram School of Engineering
 \, 327 W Woods Street\, San Marcos\, Texas\, United States\, 78666\, Virtu
 al: https://events.vtools.ieee.org/m/500151
ORGANIZER:droopad@txstate.edu
SEQUENCE:39
SUMMARY:NAND Flash Memory: Scaling Challenges for the Next-Gen AI Applicati
 ons
URL;VALUE=URI:https://events.vtools.ieee.org/m/500151
X-ALT-DESC:Description: <br /><p><span data-olk-copy-source="MessageBody">S
 ince its&nbsp\;inception&nbsp\;in&nbsp\;late&nbsp\;1980s\, innovations in 
 NAND flash have enabled massive growth in bit density along with better pe
 rformance and significant cost reduction. This has made NAND Flash the cho
 ice of storage media as the Artificial Intelligence (AI) models continue t
 o grow. As the AI era applications expand in scope\, NAND FLASH faces new 
 market opportunities and scaling challenges. Due to the demand for efficie
 nt and high-performance memory solutions\, the push to keep NAND on a sust
 ainable scaling path has never been stronger. This talk will review&nbsp\;
 technology&nbsp\;advances in material\, process\,&nbsp\;device&nbsp\;and d
 esign that have fueled the NAND scaling in 2D as well as 3D era. Several t
 echnology proposals to overcome the cost-performance trade-off of layer st
 acking are covered that will pave the path for continue cell scaling with 
 gate all around (GAA) architecture.</span></p>
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