BEGIN:VCALENDAR
VERSION:2.0
PRODID:IEEE vTools.Events//EN
CALSCALE:GREGORIAN
BEGIN:VTIMEZONE
TZID:America/Bogota
BEGIN:DAYLIGHT
DTSTART:20380118T221407
TZOFFSETFROM:-0500
TZOFFSETTO:-0500
RRULE:FREQ=YEARLY;BYDAY=3MO;BYMONTH=1
TZNAME:-05
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BEGIN:STANDARD
DTSTART:19930206T230000
TZOFFSETFROM:-0400
TZOFFSETTO:-0500
RRULE:FREQ=YEARLY;BYDAY=1SA;BYMONTH=2
TZNAME:-05
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END:VTIMEZONE
BEGIN:VEVENT
DTSTAMP:20251128T180927Z
UID:6517F507-3882-4E70-8770-65E88E5ABC7F
DTSTART;TZID=America/Bogota:20251121T080000
DTEND;TZID=America/Bogota:20251121T160000
DESCRIPTION:This lecture will overlook basics and variety of asynchronous c
 ontrolling\, from the view point of advantages for low-voltage &amp; variation
  rich conditions. This lecture takes two extreme example of complete compl
 etion detection type asynchronous designs as examples and demonstrate deta
 ils of operation and performance. In addition\, this talk will cover recen
 t trial on design flow of random logic by the self-synchronous circuits.\n
 \nCo-sponsored by: SSCS \n\nSpeaker(s): Makoto Ikeda\, \n\nBldg: Auditorio
  máximo de ciencias \, Calle 9 #27 \, Bucaramanga\, Santander\, Colombia\
 , 680002
LOCATION:Bldg: Auditorio máximo de ciencias \, Calle 9 #27 \, Bucaramanga\
 , Santander\, Colombia\, 680002
ORGANIZER:sergio.c@ieee.org
SEQUENCE:705
SUMMARY:Basics of Asynchronous circuits design
URL;VALUE=URI:https://events.vtools.ieee.org/m/501362
X-ALT-DESC:Description: &lt;br /&gt;&lt;p&gt;This lecture will overlook basics and vari
 ety of asynchronous controlling\, from the view point of advantages for lo
 w-voltage &amp;amp\; variation rich conditions. This lecture takes two extreme
  example of complete completion detection type asynchronous designs as exa
 mples and demonstrate details of operation and performance. In addition\, 
 this talk will cover recent trial on design flow of random logic by the se
 lf-synchronous circuits.&lt;/p&gt;
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