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DTSTAMP:20251105T001644Z
UID:8DD3E23A-1B8E-4148-BF02-9BD13B7FC603
DTSTART;TZID=America/Los_Angeles:20251017T000000
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DESCRIPTION:Technical seminar by IEEE Electronics Packaging Society Disting
 uished Lecturer Dr. John H. Lau with the following abstract:\n\nSilicon ph
 otonics are the semiconductor integration of EIC and PIC on a silicon subs
 trate (wafer) with complementary metal-oxide semiconductor (CMOS) technolo
 gy. On the other hand\, co-packaged optics (CPO) are heterogeneous integra
 tion packaging methods to integrate the optical engine (OE) which consists
  of photonic ICs (PIC) and the electrical engine (EE) which consists of th
 e electronic ICs (EIC) as well as the switch ASIC (application specific IC
 ). The advantages of CPO are: (a) to reduce the length of the electrical i
 nterface between the OE/EE (or PIC/EIC) and the ASIC\, (b) to reduce the e
 nergy required to drive the signal\, and (c) to cut the latency which lead
 s to better electrical performance. In the next few years\, we will see mo
 re implementations of a higher level of heterogeneous integration of PIC a
 nd EIC\, whether it is for performance\, form factor\, power consumption o
 r cost. The content of this lecture is shown below.\n\n- Silicon Photonics
 \n- Data Centers\n- Optical Transceivers\n- Optical Engine (OE) and Electr
 ical Engine (EE)\n- OBO (on-board optics)\n- NPO (near-board optics)\n- CP
 O (co-packaged optics)\n- 3D Integration of the PIC and EIC\n- 3D Heteroge
 neous Integration of PIC and EIC\n- 3D Heterogeneous Integration of ASIC S
 witch\, PIC and EIC\n- 3D Heterogeneous Integration of ASIC Switch\, PIC a
 nd EIC with Bridges\n- 3D Heterogeneous Integration of ASIC Switch\, EIC a
 nd PIC embedded in Glass-core Substrate\n- Summary and Recommendations\n\n
 Speaker(s): John Lau\, \n\nRoom: MCLD 3038\, Bldg: MacLeod Building \, 235
 6 Main Mall\, Vancouver\, British Columbia\, Canada\, V6T 1Z4
LOCATION:Room: MCLD 3038\, Bldg: MacLeod Building \, 2356 Main Mall\, Vanco
 uver\, British Columbia\, Canada\, V6T 1Z4
ORGANIZER:shahriar@ece.ubc.ca
SEQUENCE:28
SUMMARY:Co-Packaged Optics – 3D Heterogeneous Integration of Photonic IC 
 and Electronic IC
URL;VALUE=URI:https://events.vtools.ieee.org/m/505983
X-ALT-DESC:Description: <br /><p>Technical seminar by IEEE Electronics Pack
 aging Society Distinguished Lecturer Dr. John H. Lau with the following ab
 stract:</p>\n<div>\n<p class="MsoNormal">Silicon photonics are the semicon
 ductor integration of EIC and PIC on a silicon substrate (wafer) with comp
 lementary metal-oxide semiconductor (CMOS) technology. On the other hand\,
  co-packaged optics (CPO) are heterogeneous integration packaging methods 
 to integrate the optical engine (OE) which consists of photonic ICs (PIC) 
 and the electrical engine (EE) which consists of the electronic ICs (EIC) 
 as well as the switch ASIC (application specific IC). The advantages of CP
 O are: (a) to reduce the length of the electrical interface between the OE
 /EE (or PIC/EIC) and the ASIC\, (b) to reduce the energy required to drive
  the signal\, and (c) to cut the latency which leads to better electrical 
 performance. In the next few years\, we will see more implementations of a
  higher level of heterogeneous integration of PIC and EIC\, whether it is 
 for performance\, form factor\, power consumption or cost. The content of 
 this lecture is shown below.</p>\n</div>\n<ul type="disc">\n<li class="Mso
 Normal">Silicon Photonics</li>\n<li class="MsoNormal">Data Centers</li>\n<
 li class="MsoNormal">Optical Transceivers</li>\n<li class="MsoNormal">Opti
 cal Engine (OE) and Electrical Engine (EE)</li>\n<li class="MsoNormal">OBO
  (on-board optics)</li>\n<li class="MsoNormal">NPO (near-board optics)</li
 >\n<li class="MsoNormal">CPO (co-packaged optics)</li>\n<li class="MsoNorm
 al">3D Integration of the PIC and EIC</li>\n<li class="MsoNormal">3D Heter
 ogeneous Integration of PIC and EIC</li>\n<li class="MsoNormal">3D Heterog
 eneous Integration of ASIC Switch\, PIC and EIC</li>\n<li class="MsoNormal
 ">3D Heterogeneous Integration of ASIC Switch\, PIC and EIC with Bridges</
 li>\n<li class="MsoNormal">3D Heterogeneous Integration of ASIC Switch\, E
 IC and PIC embedded in Glass-core Substrate</li>\n<li class="MsoNormal">Su
 mmary and Recommendations</li>\n</ul>\n<p>&nbsp\;</p>
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