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VERSION:2.0
PRODID:IEEE vTools.Events//EN
CALSCALE:GREGORIAN
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TZID:Asia/Kolkata
BEGIN:STANDARD
DTSTART:19451014T230000
TZOFFSETFROM:+0630
TZOFFSETTO:+0530
TZNAME:IST
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BEGIN:VEVENT
DTSTAMP:20251021T083600Z
UID:38066E5A-AC78-40F7-B34A-9D46BE975E2F
DTSTART;TZID=Asia/Kolkata:20251014T090000
DTEND;TZID=Asia/Kolkata:20251014T150000
DESCRIPTION:Logical Nexus – A Smart Fusion of Fun\, Teamwork\, and Techno
 logy\n\nThe IEEE Circuits and Systems Society (CASS) and IEEE Signal Proce
 ssing Society (SPS) Student Branch Chapters of Amrita Vishwa Vidyapeetham\
 , Chennai Campus\, in association with the Department of Electronics and C
 ommunication Engineering\, successfully organized Logical Nexus – A Smar
 t Fusion of Fun\, Teamwork\, and Technology on 14th October 2025 at the RH
 ISC Lab.\n\nWith 33 teams and nearly 100 participants\, the event provided
  a dynamic platform for students to combine creativity\, technical skills\
 , and collaboration. The competition was structured in three progressive p
 hases—an IoT and Embedded Quiz\, a Poster Design Round\, and a Prototype
  Development stage—encouraging participants to move from theoretical kno
 wledge to practical innovation.\n\nThe event concluded with the announceme
 nt of the top three teams:\n1st Prize – Thadaladi\n2nd Prize – Innova3
 \n3rd Prize – CAScade\n\nLogical Nexus 2025 proved to be an enriching ex
 perience\, blending learning and innovation while promoting teamwork and h
 ands-on problem-solving among aspiring engineers.\n\nAgenda: \nAgenda – 
 Logical Nexus 2025\nDate: 14th October 2025\nVenue: RHISC Lab\, Amrita Vis
 hwa Vidyapeetham\, Chennai Campus\n\n9:00 AM – 9:30 AM – Registration 
 and Inaugural Session\n\n-\nWelcome Address\n\n-\nBrief Overview of the Ev
 ent and Rules\n\n9:30 AM – 10:30 AM – Phase 1: IoT &amp; Embedded Quiz\n\n
 -\nTechnical quiz to assess participants’ knowledge in IoT and Embedded 
 Systems\n\n-\nSegregated rounds for first-year and senior students\n\n10:3
 0 AM – 12:00 PM – Phase 2: Poster Design Round\n\n-\nQualified teams r
 eceive a problem statement\n\n-\nPreparation and presentation of solution 
 posters highlighting concept\, system design\, and feasibility\n\n12:00 PM
  – 12:45 PM – Lunch Break\n\n12:45 PM – 2:30 PM – Phase 3: Prototy
 pe Development\n\n-\nHands-on session to develop and demonstrate a working
  hardware prototype based on the proposed idea\n\n2:30 PM – 3:00 PM – 
 Evaluation and Results Announcement\n\n-\nJudging of prototypes based on i
 nnovation\, technical implementation\, and problem-solving approach\n\n-\n
 Announcement of winners and closing remarks\n\n3:00 PM – Valedictory Ses
 sion and Group Photo\n\nRoom: RHISC Lab\, Bldg: Amrita Vishwa Vidyapeetham
 \, 337/1 A\, Amrita Vishwa Vidyapeetham\,Vallal RCK Nagar\, SH 50A\, \, Ve
 ngal\, Tamil Nadu 601102\, Chennai\, Tamil Nadu\, India\, 601102
LOCATION:Room: RHISC Lab\, Bldg: Amrita Vishwa Vidyapeetham\, 337/1 A\, Amr
 ita Vishwa Vidyapeetham\,Vallal RCK Nagar\, SH 50A\, \, Vengal\, Tamil Nad
 u 601102\, Chennai\, Tamil Nadu\, India\, 601102
ORGANIZER:ch.en.u4ece23068@ch.students.amrita.edu
SEQUENCE:0
SUMMARY:LOGICAL NEXUS
URL;VALUE=URI:https://events.vtools.ieee.org/m/508949
X-ALT-DESC:Description: &lt;br /&gt;&lt;p data-start=&quot;0&quot; data-end=&quot;69&quot;&gt;&lt;strong data-
 start=&quot;0&quot; data-end=&quot;67&quot;&gt;Logical Nexus &amp;ndash\; A Smart Fusion of Fun\, Tea
 mwork\, and Technology&lt;/strong&gt;&lt;/p&gt;\n&lt;p data-start=&quot;71&quot; data-end=&quot;438&quot;&gt;The
  IEEE Circuits and Systems Society (CASS) and IEEE Signal Processing Socie
 ty (SPS) Student Branch Chapters of Amrita Vishwa Vidyapeetham\, Chennai C
 ampus\, in association with the Department of Electronics and Communicatio
 n Engineering\, successfully organized &lt;em data-start=&quot;332&quot; data-end=&quot;397&quot;
 &gt;Logical Nexus &amp;ndash\; A Smart Fusion of Fun\, Teamwork\, and Technology&lt;
 /em&gt; on 14th October 2025 at the RHISC Lab.&lt;/p&gt;\n&lt;p data-start=&quot;440&quot; data-
 end=&quot;822&quot;&gt;With 33 teams and nearly 100 participants\, the event provided a
  dynamic platform for students to combine creativity\, technical skills\, 
 and collaboration. The competition was structured in three progressive pha
 ses&amp;mdash\;an IoT and Embedded Quiz\, a Poster Design Round\, and a Protot
 ype Development stage&amp;mdash\;encouraging participants to move from theoret
 ical knowledge to practical innovation.&lt;/p&gt;\n&lt;p data-start=&quot;824&quot; data-end=
 &quot;959&quot;&gt;The event concluded with the announcement of the top three teams:&lt;br
  data-start=&quot;889&quot; data-end=&quot;892&quot;&gt;1st Prize &amp;ndash\; Thadaladi&lt;br data-star
 t=&quot;913&quot; data-end=&quot;916&quot;&gt;2nd Prize &amp;ndash\; Innova3&lt;br data-start=&quot;935&quot; data
 -end=&quot;938&quot;&gt;3rd Prize &amp;ndash\; CAScade&lt;/p&gt;\n&lt;p data-start=&quot;961&quot; data-end=&quot;1
 132&quot; data-is-last-node=&quot;&quot; data-is-only-node=&quot;&quot;&gt;&lt;em data-start=&quot;961&quot; data-e
 nd=&quot;981&quot;&gt;Logical Nexus 2025&lt;/em&gt; proved to be an enriching experience\, bl
 ending learning and innovation while promoting teamwork and hands-on probl
 em-solving among aspiring engineers.&lt;/p&gt;&lt;br /&gt;&lt;br /&gt;Agenda: &lt;br /&gt;&lt;p data-
 start=&quot;0&quot; data-end=&quot;126&quot;&gt;&lt;strong data-start=&quot;0&quot; data-end=&quot;31&quot;&gt;Agenda &amp;ndas
 h\; Logical Nexus 2025&lt;/strong&gt;&lt;br data-start=&quot;31&quot; data-end=&quot;34&quot;&gt;&lt;em data-
 start=&quot;34&quot; data-end=&quot;41&quot;&gt;Date:&lt;/em&gt; 14th October 2025&lt;br data-start=&quot;59&quot; d
 ata-end=&quot;62&quot;&gt;&lt;em data-start=&quot;62&quot; data-end=&quot;70&quot;&gt;Venue:&lt;/em&gt; RHISC Lab\, Amr
 ita Vishwa Vidyapeetham\, Chennai Campus&lt;/p&gt;\n&lt;p data-start=&quot;128&quot; data-end
 =&quot;188&quot;&gt;&lt;strong data-start=&quot;128&quot; data-end=&quot;149&quot;&gt;9:00 AM &amp;ndash\; 9:30 AM&lt;/s
 trong&gt; &amp;ndash\; Registration and Inaugural Session&lt;/p&gt;\n&lt;ul data-start=&quot;18
 9&quot; data-end=&quot;250&quot;&gt;\n&lt;li data-start=&quot;189&quot; data-end=&quot;208&quot;&gt;\n&lt;p data-start=&quot;1
 91&quot; data-end=&quot;208&quot;&gt;Welcome Address&lt;/p&gt;\n&lt;/li&gt;\n&lt;li data-start=&quot;209&quot; data-e
 nd=&quot;250&quot;&gt;\n&lt;p data-start=&quot;211&quot; data-end=&quot;250&quot;&gt;Brief Overview of the Event 
 and Rules&lt;/p&gt;\n&lt;/li&gt;\n&lt;/ul&gt;\n&lt;p data-start=&quot;252&quot; data-end=&quot;309&quot;&gt;&lt;strong da
 ta-start=&quot;252&quot; data-end=&quot;274&quot;&gt;9:30 AM &amp;ndash\; 10:30 AM&lt;/strong&gt; &amp;ndash\; 
 &lt;em data-start=&quot;277&quot; data-end=&quot;307&quot;&gt;Phase 1: IoT &amp;amp\; Embedded Quiz&lt;/em&gt;
 &lt;/p&gt;\n&lt;ul data-start=&quot;310&quot; data-end=&quot;447&quot;&gt;\n&lt;li data-start=&quot;310&quot; data-end=
 &quot;390&quot;&gt;\n&lt;p data-start=&quot;312&quot; data-end=&quot;390&quot;&gt;Technical quiz to assess partic
 ipants&amp;rsquo\; knowledge in IoT and Embedded Systems&lt;/p&gt;\n&lt;/li&gt;\n&lt;li data-
 start=&quot;391&quot; data-end=&quot;447&quot;&gt;\n&lt;p data-start=&quot;393&quot; data-end=&quot;447&quot;&gt;Segregated
  rounds for first-year and senior students&lt;/p&gt;\n&lt;/li&gt;\n&lt;/ul&gt;\n&lt;p data-star
 t=&quot;449&quot; data-end=&quot;507&quot;&gt;&lt;strong data-start=&quot;449&quot; data-end=&quot;472&quot;&gt;10:30 AM &amp;n
 dash\; 12:00 PM&lt;/strong&gt; &amp;ndash\; &lt;em data-start=&quot;475&quot; data-end=&quot;505&quot;&gt;Phas
 e 2: Poster Design Round&lt;/em&gt;&lt;/p&gt;\n&lt;ul data-start=&quot;508&quot; data-end=&quot;661&quot;&gt;\n&lt;
 li data-start=&quot;508&quot; data-end=&quot;555&quot;&gt;\n&lt;p data-start=&quot;510&quot; data-end=&quot;555&quot;&gt;Qu
 alified teams receive a problem statement&lt;/p&gt;\n&lt;/li&gt;\n&lt;li data-start=&quot;556&quot;
  data-end=&quot;661&quot;&gt;\n&lt;p data-start=&quot;558&quot; data-end=&quot;661&quot;&gt;Preparation and prese
 ntation of solution posters highlighting concept\, system design\, and fea
 sibility&lt;/p&gt;\n&lt;/li&gt;\n&lt;/ul&gt;\n&lt;p data-start=&quot;663&quot; data-end=&quot;702&quot;&gt;&lt;strong dat
 a-start=&quot;663&quot; data-end=&quot;686&quot;&gt;12:00 PM &amp;ndash\; 12:45 PM&lt;/strong&gt; &amp;ndash\; 
 Lunch Break&lt;/p&gt;\n&lt;p data-start=&quot;704&quot; data-end=&quot;763&quot;&gt;&lt;strong data-start=&quot;70
 4&quot; data-end=&quot;726&quot;&gt;12:45 PM &amp;ndash\; 2:30 PM&lt;/strong&gt; &amp;ndash\; &lt;em data-sta
 rt=&quot;729&quot; data-end=&quot;761&quot;&gt;Phase 3: Prototype Development&lt;/em&gt;&lt;/p&gt;\n&lt;ul data-
 start=&quot;764&quot; data-end=&quot;867&quot;&gt;\n&lt;li data-start=&quot;764&quot; data-end=&quot;867&quot;&gt;\n&lt;p data
 -start=&quot;766&quot; data-end=&quot;867&quot;&gt;Hands-on session to develop and demonstrate a 
 working hardware prototype based on the proposed idea&lt;/p&gt;\n&lt;/li&gt;\n&lt;/ul&gt;\n&lt;
 p data-start=&quot;869&quot; data-end=&quot;930&quot;&gt;&lt;strong data-start=&quot;869&quot; data-end=&quot;890&quot;&gt;
 2:30 PM &amp;ndash\; 3:00 PM&lt;/strong&gt; &amp;ndash\; Evaluation and Results Announce
 ment&lt;/p&gt;\n&lt;ul data-start=&quot;931&quot; data-end=&quot;1080&quot;&gt;\n&lt;li data-start=&quot;931&quot; data
 -end=&quot;1032&quot;&gt;\n&lt;p data-start=&quot;933&quot; data-end=&quot;1032&quot;&gt;Judging of prototypes ba
 sed on innovation\, technical implementation\, and problem-solving approac
 h&lt;/p&gt;\n&lt;/li&gt;\n&lt;li data-start=&quot;1033&quot; data-end=&quot;1080&quot;&gt;\n&lt;p data-start=&quot;1035&quot;
  data-end=&quot;1080&quot;&gt;Announcement of winners and closing remarks&lt;/p&gt;\n&lt;/li&gt;\n&lt;
 /ul&gt;\n&lt;p data-start=&quot;1082&quot; data-end=&quot;1133&quot;&gt;&lt;strong data-start=&quot;1082&quot; data-
 end=&quot;1093&quot;&gt;3:00 PM&lt;/strong&gt; &amp;ndash\; Valedictory Session and Group Photo&lt;/
 p&gt;
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