BEGIN:VCALENDAR
VERSION:2.0
PRODID:IEEE vTools.Events//EN
CALSCALE:GREGORIAN
BEGIN:VTIMEZONE
TZID:Asia/Kolkata
BEGIN:STANDARD
DTSTART:19451014T230000
TZOFFSETFROM:+0630
TZOFFSETTO:+0530
TZNAME:IST
END:STANDARD
END:VTIMEZONE
BEGIN:VEVENT
DTSTAMP:20251211T070123Z
UID:8CE4A9AE-9A08-482B-8B32-EBA3E65752B7
DTSTART;TZID=Asia/Kolkata:20251107T090000
DTEND;TZID=Asia/Kolkata:20251108T160000
DESCRIPTION:EVENT FOCUS\n\nMastering Analog &amp; Digital Frontiers\n\nHands-on
  FPGA &amp; ASIC Problem Solving\n\nArchitecting Tomorrow&#39;s Systems\n\nDebuggi
 ng the Future of VLSI\n\nCo-sponsored by: Dr JOSEPH ANTHONY PRATHAP\n\nPre
 sidency University\, Itgalpur Rajanakunte\, Yelahanka\, Bengaluru\, Karnat
 aka\, India\, 560064
LOCATION:Presidency University\, Itgalpur Rajanakunte\, Yelahanka\, Bengalu
 ru\, Karnataka\, India\, 560064
ORGANIZER:rajivranjansingh@presidencyuniversity.in
SEQUENCE:20
SUMMARY:CASCADE 2025
URL;VALUE=URI:https://events.vtools.ieee.org/m/510949
X-ALT-DESC:Description: &lt;br /&gt;&lt;p&gt;EVENT FOCUS&lt;/p&gt;\n&lt;p&gt;Mastering Analog &amp;amp\
 ; Digital Frontiers&lt;/p&gt;\n&lt;p&gt;Hands-on FPGA &amp;amp\; ASIC Problem Solving&lt;/p&gt;\
 n&lt;p&gt;Architecting Tomorrow&#39;s Systems&lt;/p&gt;\n&lt;p&gt;Debugging the Future of VLSI&lt;/
 p&gt;\n&lt;p&gt;&lt;img src=&quot;https://events.vtools.ieee.org/vtools_ui/media/display/e2
 ddfa79-6cc8-4fca-9768-61b3b5a2f2d1&quot;&gt;&lt;/p&gt;
END:VEVENT
END:VCALENDAR