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DESCRIPTION:The IEEE Greece CAS/SSC joint Chapter\, in the frame of\n\nthe 
 IEEE Solid-State Circuits Society Distinguished Lecturer Program\,\n\nis i
 nviting you to the lecture of:\n\nProf. Makoto Nagata\n\nProfessor at Grad
 uate School of Science\, Technology and Innovation\,\n\nKobe University\, 
 Kobe\, Japan\n\nentitled:\n\n“Hardware Security and Safety of IC Chips a
 nd Systems”\n\nAbstract:\n\nIC chips are key enablers to a smartly netwo
 rked society and need to be more compliant to security and safety. For exa
 mple\, semiconductor solutions for autonomous vehicles must meet stringent
  regulations and requirements. While designers develop circuits and system
 s to meet the performance and functionality of such products\, countermeas
 ures are proactively implemented in silicon to protect against harmful dis
 turbances and even intentional adversarial attacks. This talk will start w
 ith electromagnetic compatibility (EMC) techniques applied to IC chips for
  safety to motivate EMC-aware design\, analysis\, and implementation. It w
 ill discuss IC design challenges to achieve the higher levels of hardware 
 security (HWS). Crypto-based secure IC chips are investigated to avoid the
  risks of side-channel leakages and side-channel attacks\, corroborated wi
 th silicon demonstrating analog techniques to protect digital functionalit
 y. The EMC and HWS disciplines derived from electromagnetic principles are
  key to establishing IC design principles for security and safety.\n\nSpea
 ker(s): Makoto Nagata\n\nRoom: Auditorium\, Bldg: D\, Aristotle University
  of Thessaloniki\, Electrical and Computer Engineering Department\, Thessa
 loniki\, Macedonia\, Greece\, Virtual: https://events.vtools.ieee.org/m/51
 3724
LOCATION:Room: Auditorium\, Bldg: D\, Aristotle University of Thessaloniki\
 , Electrical and Computer Engineering Department\, Thessaloniki\, Macedoni
 a\, Greece\, Virtual: https://events.vtools.ieee.org/m/513724
ORGANIZER:alkis@ece.auth.gr
SEQUENCE:17
SUMMARY:DLP Talk of Prof. Makoto Nagata
URL;VALUE=URI:https://events.vtools.ieee.org/m/513724
X-ALT-DESC:Description: &lt;br /&gt;&lt;p class=&quot;MsoNormal&quot; style=&quot;text-align: cente
 r\;&quot; align=&quot;center&quot;&gt;The IEEE Greece CAS/SSC joint Chapter\, in the frame o
 f&lt;/p&gt;\n&lt;p class=&quot;MsoNormal&quot; align=&quot;center&quot;&gt;the IEEE Solid-State Circuits S
 ociety &lt;strong&gt;Distinguished Lecturer Program&lt;/strong&gt;\,&lt;/p&gt;\n&lt;p class=&quot;Ms
 oNormal&quot; align=&quot;center&quot;&gt;is inviting you to the lecture of:&lt;/p&gt;\n&lt;p class=&quot;
 MsoNormal&quot; align=&quot;center&quot;&gt;&lt;strong&gt;&lt;span lang=&quot;EN-GB&quot;&gt;Prof. Makoto Nagata&lt;/
 span&gt;&lt;/strong&gt;&lt;/p&gt;\n&lt;p class=&quot;MsoNormal&quot; align=&quot;center&quot;&gt;Professor at Gradu
 ate School of Science\, Technology and Innovation\,&lt;/p&gt;\n&lt;p class=&quot;MsoNorm
 al&quot; align=&quot;center&quot;&gt;Kobe University\, Kobe\, Japan&lt;/p&gt;\n&lt;p class=&quot;MsoNormal
 &quot; align=&quot;center&quot;&gt;&lt;strong&gt;entitled&lt;/strong&gt;&lt;strong&gt;&lt;span lang=&quot;EN-GB&quot;&gt;:&lt;/sp
 an&gt;&lt;/strong&gt;&lt;/p&gt;\n&lt;h2 style=&quot;text-align: center\;&quot; align=&quot;left&quot;&gt;&lt;strong&gt;&lt;s
 pan lang=&quot;EN-GB&quot;&gt;&amp;ldquo\;&lt;/span&gt;&lt;/strong&gt;&lt;strong&gt;Hardware Security and Saf
 ety of IC Chips and Systems&lt;/strong&gt;&lt;strong&gt;&amp;rdquo\; &lt;/strong&gt;&lt;/h2&gt;\n&lt;p cl
 ass=&quot;MsoNormal&quot; align=&quot;center&quot;&gt;&amp;nbsp\;&lt;/p&gt;\n&lt;p class=&quot;MsoNormal&quot;&gt;&lt;strong&gt;A
 bstract:&lt;/strong&gt;&lt;/p&gt;\n&lt;p class=&quot;MsoNormal&quot;&gt;IC chips are key enablers to a
  smartly networked society and need to be more compliant to security and s
 afety. For example\, semiconductor solutions for autonomous vehicles must 
 meet stringent regulations and requirements. While designers develop circu
 its and systems to meet the performance and functionality of such products
 \, countermeasures are proactively implemented in silicon to protect again
 st harmful disturbances and even intentional adversarial attacks. This tal
 k will start with electromagnetic compatibility (EMC) techniques applied t
 o IC chips for safety to motivate EMC-aware design\, analysis\, and implem
 entation. It will discuss IC design challenges to achieve the higher level
 s of hardware security (HWS). Crypto-based secure IC chips are investigate
 d to avoid the risks of side-channel leakages and side-channel attacks\, c
 orroborated with silicon demonstrating analog techniques to protect digita
 l functionality. The EMC and HWS disciplines derived from electromagnetic 
 principles are key to establishing IC design principles for security and s
 afety.&lt;/p&gt;\n&lt;p class=&quot;MsoNormal&quot; align=&quot;center&quot;&gt;&lt;strong&gt;&amp;nbsp\;&lt;/strong&gt;&lt;/
 p&gt;\n&lt;p class=&quot;MsoNormal&quot; align=&quot;center&quot;&gt;&amp;nbsp\;&lt;/p&gt;
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