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UID:242F455A-22A8-4F7F-805B-8512236883D7
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DESCRIPTION:Energy Efficient ADC Design Techniques\n\nAbstract: In this rev
 iew presentation\, we will have a look at ADC efficiency trends over the y
 ears as function of ADC architecture\, resolution\, and sampling rate. Aft
 er that\, state-of-the-art design examples from literature are reviewed\, 
 and the key techniques to achieve high efficiency are highlighted. This in
 cludes techniques at circuit\, system\, layout and algorithmic levels. ADC
  architectures such as Pipelined\, Sigma-Delta\, SAR\, Noise-Shaping SAR\,
  and others are all briefly covered. The presentation concludes with a ref
 lection on the differences and similarities of the highlighted efficiency 
 features.\n\nUltra low power SAR ADCs and versatile\, dynamic sensor inter
 faces\n\nAbstract: In this talk\, we will take a look at ultra low power s
 ensor interfaces for IoT applications. In such applications\, the sensing 
 operation is often done at a relatively low frequency\, and sometimes it i
 s heavily duty-cycled\, or it should be triggered by particular events or 
 thresholds. For that reason\, dynamic operation is beneficial as compared 
 to static operation. We will review ADC and sensor interface architectures
  that can operate dynamically and that can be triggered by a single clock 
 pulse. Various capacitive and resistive sensor interfaces are shown\, and 
 the final example shows a resistive-based temperature sensor interface inc
 luding analog correction techniques for gain\, offset and distortion.\n\nS
 peaker(s): Pieter Harpe\, \n\nRoom: H-24\, Al. Mickiewicza 30\, Bud. B1-B2
 \, Kraków\, Malopolskie\, Poland\, 30-059
LOCATION:Room: H-24\, Al. Mickiewicza 30\, Bud. B1-B2\, Kraków\, Malopolsk
 ie\, Poland\, 30-059
ORGANIZER:kasinski@agh.edu.pl
SEQUENCE:12
SUMMARY:Pieter Harpe - Short course on ADC design
URL;VALUE=URI:https://events.vtools.ieee.org/m/515693
X-ALT-DESC:Description: <br /><h2>Energy Efficient ADC Design Techniques</h
 2>\n<p><strong>Abstract: </strong>In this review presentation\, we will ha
 ve a look at ADC efficiency trends over the years as function of ADC archi
 tecture\, resolution\, and sampling rate. After that\, state-of-the-art de
 sign examples from literature are reviewed\, and the key techniques to ach
 ieve high efficiency are highlighted. This includes techniques at circuit\
 , system\, layout and algorithmic levels. ADC architectures such as Pipeli
 ned\, Sigma-Delta\, SAR\, Noise-Shaping SAR\, and others are all briefly c
 overed. The presentation concludes with a reflection on the differences an
 d similarities of the highlighted efficiency features.</p>\n<h2>Ultra low 
 power SAR ADCs and versatile\, dynamic sensor interfaces</h2>\n<p><strong>
 Abstract: </strong>In this talk\, we will take a look at ultra low power s
 ensor interfaces for IoT applications. In such applications\, the sensing 
 operation is often done at a relatively low frequency\, and sometimes it i
 s heavily duty-cycled\, or it should be triggered by particular events or 
 thresholds. For that reason\, dynamic operation is beneficial as compared 
 to static operation. We will review ADC and sensor interface architectures
  that can operate dynamically and that can be triggered by a single clock 
 pulse. Various capacitive and resistive sensor interfaces are shown\, and 
 the final example shows a resistive-based temperature sensor interface inc
 luding analog correction techniques for gain\, offset and distortion.</p>
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