BEGIN:VCALENDAR VERSION:2.0 PRODID:IEEE vTools.Events//EN CALSCALE:GREGORIAN BEGIN:VTIMEZONE TZID:America/New_York BEGIN:DAYLIGHT DTSTART:20260308T030000 TZOFFSETFROM:-0500 TZOFFSETTO:-0400 RRULE:FREQ=YEARLY;BYDAY=2SU;BYMONTH=3 TZNAME:EDT END:DAYLIGHT BEGIN:STANDARD DTSTART:20251102T010000 TZOFFSETFROM:-0400 TZOFFSETTO:-0500 RRULE:FREQ=YEARLY;BYDAY=1SU;BYMONTH=11 TZNAME:EST END:STANDARD END:VTIMEZONE BEGIN:VEVENT DTSTAMP:20251203T210022Z UID:775FC48C-5E0B-4698-A89F-C492F4519A9D DTSTART;TZID=America/New_York:20251202T180000 DTEND;TZID=America/New_York:20251202T190000 DESCRIPTION:[]Modular Multilevel Converters (MMCs) are pivotal in high-volt age applications such as HVDC transmission\, renewable energy integration\ , and medium-voltage motor drives due to their modularity and superior con trollability compared to conventional power conversion topologies. However \, the bulky and costly capacitors in conventional submodules (SMs) of MMC s pose significant challenges in terms of volume\, weight\, and efficiency \, often accounting for more than 50% of the converter’s weight and 80% of its volume.\n\nIn this talk\, Dr. Jinia Roy will present a novel SM cir cuit incorporating the Active Power Decoupling (APD) technique to address these limitations through advanced control and circuit design. The propose d APD-SM architecture operates on the principle of redistributing ripple p ower—predominantly at the line and twice the line frequency—into a ded icated decoupling path. This circuit provides a parallel route for oscilla tory current components\, effectively offloading stress from the main capa citor and enabling a significant reduction in its size.\n\nThe APD-SM enab les up to a sevenfold reduction in capacitor size while maintaining voltag e ripple within acceptable limits. Additionally\, it inherently reduces fa ult current\, circulating current\, and allowing for a more compact arm in ductor design. The presentation will delve into the theoretical foundation s\, impedance-based analysis\, and control strategies that validate the ef fectiveness of the APD-SM.\n\nCo-sponsored by: Tanvi Nagarale\n\nSpeaker(s ): Jinia Roy\, \n\nAgenda: \n5:50 pm - Webex opens to all\, informal/virtu al networking\, introductions\n6:00 pm - Distinguished Lecture Talk begins \n7:00 pm - End of talk\, Begin Q&A\n7:30 pm - Conclusion of event and for mal vote of thanks to the speaker\n\nAll times are EST/EDT\n\nVirtual: htt ps://events.vtools.ieee.org/m/518573 LOCATION:Virtual: https://events.vtools.ieee.org/m/518573 ORGANIZER:sharan.kalwani@ieee.org SEQUENCE:28 SUMMARY:Advancing Fault Tolerance & Power Density in Modular Multilevel Con verters via Innovative Circuit Design/Control Strategies URL;VALUE=URI:https://events.vtools.ieee.org/m/518573 X-ALT-DESC:Description: <br /><p><span style="font-family: 'trebuchet ms'\, geneva\, sans-serif\; font-size: 14pt\;"><img style="border-width: 10px\; border-style: hidden\; margin: 10px auto\; display: block\;" src="https:/ /events.vtools.ieee.org/vtools_ui/media/display/0744418a-55b0-479d-8674-65 6683c5cc33" alt="" width="375" height="149">Modular Multilevel Converters (MMCs) are pivotal in high-voltage applications such as HVDC transmission\ , renewable energy integration\, and medium-voltage motor drives due to th eir modularity and superior controllability compared to conventional power conversion topologies. However\, the bulky and costly capacitors in conve ntional submodules (SMs) of MMCs pose significant challenges in terms of v olume\, weight\, and efficiency\, often accounting for more than 50% of th e converter&rsquo\;s weight and 80% of its volume.</span></p>\n<p style="t ext-align: justify\;"><span style="font-family: 'trebuchet ms'\, geneva\, sans-serif\; font-size: 14pt\;">In this talk\, Dr. Jinia Roy will present a novel SM circuit incorporating the Active Power Decoupling (APD) techniq ue to address these limitations through advanced control and circuit desig n. The proposed APD-SM architecture operates on the principle of redistrib uting ripple power&mdash\;predominantly at the line and twice the line fre quency&mdash\;into a dedicated decoupling path. This circuit provides a pa rallel route for oscillatory current components\, effectively offloading s tress from the main capacitor and enabling a significant reduction in its size.</span></p>\n<p style="text-align: justify\;"><span style="font-famil y: 'trebuchet ms'\, geneva\, sans-serif\; font-size: 14pt\;">The APD-SM en ables up to a sevenfold reduction in capacitor size while maintaining volt age ripple within acceptable limits. Additionally\, it inherently reduces fault current\, circulating current\, and allowing for a more compact arm inductor design. The presentation will delve into the theoretical foundati ons\, impedance-based analysis\, and control strategies that validate the effectiveness of the APD-SM.</span></p><br /><br />Agenda: <br /><p>5:50 p m - Webex opens&nbsp\; to all\, informal/virtual networking\, introduction s<br>6:00 pm - Distinguished Lecture Talk begins<br>7:00 pm - End of talk\ , Begin Q&amp\;A<br>7:30 pm - Conclusion of event and formal vote of thank s to the speaker</p>\n<p>All times are EST/EDT</p> END:VEVENT END:VCALENDAR