BEGIN:VCALENDAR VERSION:2.0 PRODID:IEEE vTools.Events//EN CALSCALE:GREGORIAN BEGIN:VTIMEZONE TZID:Asia/Kolkata BEGIN:STANDARD DTSTART:19451014T230000 TZOFFSETFROM:+0630 TZOFFSETTO:+0530 TZNAME:IST END:STANDARD END:VTIMEZONE BEGIN:VEVENT DTSTAMP:20251230T092531Z UID:75371DAC-3B8E-4D22-BFDE-4C1EC4D1C7A4 DTSTART;TZID=Asia/Kolkata:20251222T140000 DTEND;TZID=Asia/Kolkata:20251222T153000 DESCRIPTION:IEEE SPS\, IES Chapters Hyderabad Section in association with I ES\, SPS & CASS IEEE VNRVJIET Student Branch\nWe are glad to invite you to an insightful session on: Signal Processing in Electronic Product Archite cture\, Design and Validation\n\nAbstract:\nSignal processing is the core engine behind modern electronic\, automotive (EV)\, aerospace\, and defenc e-grade electronic systems. This session outlines the complete role of a S ignal Processing Engineer—from translating system-level requirements int o architectures\, to implementing algorithms on DSP\, FPGA\, and embedded platforms. We will examine how specifications such as range\, resolution\, bandwidth\, and interference tolerance guide choices in sampling\, filter ing\, detection\, modulation\, and beamforming. The talk highlights practi cal workflows including simulation modelling\, test-vector generation\, sp ectral/temporal analysis\, and validation using MATLAB\, Python\, and adva nced RF/DAQ instruments. Real-world examples from EW receivers\, radar fro nt ends\, EV sensor fusion\, and wireless links illustrate how algorithms evolve from whiteboard concepts to production-ready implementations. Empha sis is placed on performance verification under noise\, channel impairment s\, jamming\, and environmental stress. The session also covers how engine ers communicate technical insights—turning SNR\, BER\, and detection met rics into intuitive demonstrations for stakeholders.\nThe talk will also o utline the knowledge and skills required for this role\, specifically targ eting electronic product design for the defence and aerospace industries.\ n\n🎙️ Resource Person:\nMr. K. Srinivasa Raju\nCEO\, Unistring Tech S olutions\nBiodata\nMr. K. Srinivasa Raju is the Chief Executive Officer of Unistring Tech Solutions (UTS)\, a subsidiary of ZEN Technologies\, where he leads advanced innovation in Electronic Warfare (EW)\, Radar\, and Ant i-Drone Systems. He holds an M.Tech from the Indian Institute of Science ( IISc)\, Bangalore\, and a B.Tech from NIT Warangal. Before joining UTS\, h e served as a scientist at the Defence Electronics Research Laboratory (DL RL)\, DRDO\, from 2003 to 2014\, contributing significantly to the develop ment of cutting-edge EW systems. At UTS\, he leads the company’s core R& D divisions\, including system design\, digital signal processing\, and VL SI\, while also overseeing HR and training to build a strong\, industry-re ady workforce. He holds two patents and has several publications in the fi elds of EW and radar. Mr. Srinivasa Raju is passionate about advancing tec hnological capabilities and fostering skill development to meet the evolvi ng needs of the defence and allied sectors.\n📅 Date: 22 December 2025\n ⏰ Time: 2:00 PM – 3:30 PM\n📍 Venue: K. S. Auditorium\, VNR VJIET\n ✨ “Innovation begins where engineering intuition meets signal processi ng intelligence.”\nThis session will explore how advanced signal process ing techniques shape modern electronic product design\, architecture\, and validation.\nWe welcome all students and faculty members to join and bene fit from this expert talk.\n\n[]\n\nAgenda: \nInviting Participants\nWelco me address\n\nIntroduction of the Speaker\nSession by Mr. K. Srinivasa Raj u\nCEO\, Unistring Tech Solutions\n\nConcluding Remarks\nVote of Thanks\n\ nBldg: KS Auditorium\, VNR Vignana Jyothi Institute of Engineering and Tec hnology\, Hyderabad\, Telengana\, India\, 500090 LOCATION:Bldg: KS Auditorium\, VNR Vignana Jyothi Institute of Engineering and Technology\, Hyderabad\, Telengana\, India\, 500090 ORGANIZER:padmasai_y@ieee.org SEQUENCE:37 SUMMARY:IEEE SPS\, IES & CASS Joint Technical Session Hosted by IEEE VNRVJI ET Student Branch|An insightful session on: Signal Processing in Electroni c Product Architecture\, Design and Validation URL;VALUE=URI:https://events.vtools.ieee.org/m/519071 X-ALT-DESC:Description: <br /><p>IEEE SPS\, IES Chapters Hyderabad Section in association with IES\, SPS &amp\;&nbsp\; CASS &nbsp\;IEEE VNRVJIET Stud ent Branch<br>We are glad to invite you to an insightful session on:&nbsp\ ;<strong>Signal Processing in Electronic Product Architecture\, Design and Validation<br></strong></p>\n<div><strong>Abstract:&nbsp\;</strong></div> \n<div>Signal processing is the core engine behind modern electronic\, aut omotive (EV)\, aerospace\, and defence-grade electronic systems. This sess ion outlines the complete role of a Signal Processing Engineer&mdash\;from translating system-level requirements into architectures\, to implementin g algorithms on DSP\, FPGA\, and embedded platforms. We will examine how s pecifications such as range\, resolution\, bandwidth\, and interference to lerance guide choices in sampling\, filtering\, detection\, modulation\, a nd beamforming. The talk highlights practical workflows including simulati on modelling\, test-vector generation\, spectral/temporal analysis\, and v alidation using MATLAB\, Python\, and advanced RF/DAQ instruments. Real-wo rld examples from EW receivers\, radar front ends\, EV sensor fusion\, and wireless links illustrate how algorithms evolve from whiteboard concepts to production-ready implementations. Emphasis is placed on performance ver ification under noise\, channel impairments\, jamming\, and environmental stress. The session also covers how engineers communicate technical insigh ts&mdash\;turning SNR\, BER\, and detection metrics into intuitive demonst rations for stakeholders.<br><strong>The talk will also outline the knowle dge and skills required for this role\, specifically targeting electronic product design for the defence and aerospace industries.</strong></div>\n< p>🎙️ Resource Person:<br><strong>Mr. K. Srinivasa Raju</strong><br>CE O\, Unistring Tech Solutions<br>Biodata<br>Mr. K. Srinivasa Raju is the Ch ief Executive Officer of Unistring Tech Solutions (UTS)\, a subsidiary of ZEN Technologies\, where he leads advanced innovation in Electronic Warfar e (EW)\, Radar\, and Anti-Drone Systems. He holds an M.Tech from the India n Institute of Science (IISc)\, Bangalore\, and a B.Tech from NIT Warangal . Before joining UTS\, he served as a scientist at the Defence Electronics Research Laboratory (DLRL)\, DRDO\, from 2003 to 2014\, contributing sign ificantly to the development of cutting-edge EW systems. At UTS\, he leads the company&rsquo\;s core R&amp\;D divisions\, including system design\, digital signal processing\, and VLSI\, while also overseeing HR and traini ng to build a strong\, industry-ready workforce. He holds two patents and has several publications in the fields of EW and radar. Mr. Srinivasa Raju is passionate about advancing technological capabilities and fostering sk ill development to meet the evolving needs of the defence and allied secto rs.<br>📅 Date: 22 December 2025<br>⏰ Time: 2:00 PM &ndash\; 3:30 PM<b r>📍 Venue: K. S. Auditorium\, VNR VJIET<br>✨ &ldquo\;Innovation begin s where engineering intuition meets signal processing intelligence.&rdquo\ ;<br>This session will explore how advanced signal processing techniques s hape modern electronic product design\, architecture\, and validation.<br> We welcome all students and faculty members to join and benefit from this expert talk.</p>\n<p><img src="https://events.vtools.ieee.org/vtools_ui/me dia/display/ac5d65ce-b4ad-4560-8921-7cea384e433f" alt="" width="958" heigh t="958"></p><br /><br />Agenda: <br /><p>Inviting Participants&nbsp\;<br>W elcome address&nbsp\;</p>\n<p>Introduction of the Speaker<br>Session by <s trong>Mr. K. Srinivasa Raju</strong><br>&nbsp\; &nbsp\; &nbsp\; &nbsp\; &n bsp\; &nbsp\; &nbsp\; &nbsp\; &nbsp\; CEO\, Unistring Tech Solutions</p>\n <p>Concluding Remarks<br>Vote of Thanks</p> END:VEVENT END:VCALENDAR