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VERSION:2.0
PRODID:IEEE vTools.Events//EN
CALSCALE:GREGORIAN
BEGIN:VTIMEZONE
TZID:Asia/Kolkata
BEGIN:STANDARD
DTSTART:19451014T230000
TZOFFSETFROM:+0630
TZOFFSETTO:+0530
TZNAME:IST
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BEGIN:VEVENT
DTSTAMP:20251211T041839Z
UID:86710C1F-AFB5-44C0-B150-0A8C99F314D5
DTSTART;TZID=Asia/Kolkata:20251203T190000
DTEND;TZID=Asia/Kolkata:20251203T210000
DESCRIPTION:The symbiosis of AI and silicon represents one of the most tran
 sformative shifts in modern computing\, where intelligent algorithms and a
 dvanced semiconductor architectures evolve together to unlock unprecedente
 d performance\, efficiency\, and real-world capability. As AI models grow 
 in complexity and scale\, traditional CPUs can no longer sustain their com
 putational demands\, driving the industry toward specialized silicon—GPU
 s\, TPUs\, custom accelerators\, neuromorphic chips\, and in-memory comput
 ing fabrics. At the same time\, AI is reshaping how silicon itself is desi
 gned\, verified\, optimized\, and manufactured\, with machine learning inc
 reasingly automating chip layout\, power estimation\, fault prediction\, a
 nd yield enhancement. This mutually reinforcing relationship accelerates i
 nnovation on both fronts: silicon enables real-time inference at the edge\
 , low-latency decision-making in autonomous systems\, and massive parallel
 ism for cloud-scale training\, while AI-driven design methodologies shorte
 n development cycles and push hardware efficiency to new limits. Together\
 , AI and silicon form a powerful co-evolution—where smarter algorithms d
 emand smarter hardware\, and smarter hardware enables smarter\, more perva
 sive AI—driving the next era of computing across consumer electronics\, 
 healthcare\, robotics\, transportation\, and beyond.\n\nSpeaker: Ms. RV Ka
 mala\, Senior member technical staff\, AMD\n\nDate: 3rd Dec 2025\n\nTime: 
 7.00 PM (IST)\n\n[]\n\nVirtual: https://events.vtools.ieee.org/m/519076
LOCATION:Virtual: https://events.vtools.ieee.org/m/519076
ORGANIZER:jayanthi@ieee.org
SEQUENCE:18
SUMMARY:IEEE Hyderabad Section CAS Chapter Presents Technical Talk Titled &quot;
 Symbiosis of AI and Silicon&quot;
URL;VALUE=URI:https://events.vtools.ieee.org/m/519076
X-ALT-DESC:Description: &lt;br /&gt;&lt;p&gt;&lt;span style=&quot;font-size: 12.0pt\; line-heig
 ht: 115%\; font-family: &#39;Aptos&#39;\,sans-serif\; mso-ascii-theme-font: minor-
 latin\; mso-fareast-font-family: Aptos\; mso-fareast-theme-font: minor-lat
 in\; mso-hansi-theme-font: minor-latin\; mso-bidi-font-family: Mangal\; ms
 o-bidi-theme-font: minor-bidi\; mso-ansi-language: EN-IN\; mso-fareast-lan
 guage: EN-US\; mso-bidi-language: AR-SA\;&quot;&gt;The &lt;strong&gt;symbiosis of AI and
  silicon&lt;/strong&gt; represents one of the most transformative shifts in mode
 rn computing\, where intelligent algorithms and advanced semiconductor arc
 hitectures evolve together to unlock unprecedented performance\, efficienc
 y\, and real-world capability. As AI models grow in complexity and scale\,
  traditional CPUs can no longer sustain their computational demands\, driv
 ing the industry toward specialized silicon&amp;mdash\;GPUs\, TPUs\, custom ac
 celerators\, neuromorphic chips\, and in-memory computing fabrics. At the 
 same time\, AI is reshaping how silicon itself is designed\, verified\, op
 timized\, and manufactured\, with machine learning increasingly automating
  chip layout\, power estimation\, fault prediction\, and yield enhancement
 . This mutually reinforcing relationship accelerates innovation on both fr
 onts: silicon enables real-time inference at the edge\, low-latency decisi
 on-making in autonomous systems\, and massive parallelism for cloud-scale 
 training\, while AI-driven design methodologies shorten development cycles
  and push hardware efficiency to new limits. Together\, AI and silicon for
 m a powerful co-evolution&amp;mdash\;where smarter algorithms demand smarter h
 ardware\, and smarter hardware enables smarter\, more pervasive AI&amp;mdash\;
 driving the next era of computing across consumer electronics\, healthcare
 \, robotics\, transportation\, and beyond.&lt;/span&gt;&lt;/p&gt;\n&lt;p&gt;&lt;strong&gt;&lt;span st
 yle=&quot;font-size: 12.0pt\; line-height: 115%\; font-family: &#39;Aptos&#39;\,sans-se
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 -language: EN-IN\; mso-fareast-language: EN-US\; mso-bidi-language: AR-SA\
 ;&quot;&gt;Speaker: &lt;/span&gt;&lt;/strong&gt;&lt;span style=&quot;font-size: 12.0pt\; line-height: 
 115%\; font-family: &#39;Aptos&#39;\,sans-serif\; mso-ascii-theme-font: minor-lati
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 di-theme-font: minor-bidi\; mso-ansi-language: EN-IN\; mso-fareast-languag
 e: EN-US\; mso-bidi-language: AR-SA\;&quot;&gt;Ms. RV Kamala\, &lt;/span&gt;Senior membe
 r technical staff\, &lt;span style=&quot;font-size: 12.0pt\; line-height: 115%\; f
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 &quot;&gt;Date:&amp;nbsp\;&lt;/span&gt;&lt;/strong&gt;&lt;span style=&quot;font-size: 12.0pt\; line-height
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 age: EN-US\; mso-bidi-language: AR-SA\;&quot;&gt;3rd Dec 2025&lt;/span&gt;&lt;/p&gt;\n&lt;p&gt;&lt;stro
 ng&gt;&lt;span style=&quot;font-size: 12.0pt\; line-height: 115%\; font-family: &#39;Apto
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 age: AR-SA\;&quot;&gt;Time:&amp;nbsp\;&lt;/span&gt;&lt;/strong&gt;&lt;span style=&quot;font-size: 12.0pt\;
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 areast-language: EN-US\; mso-bidi-language: AR-SA\;&quot;&gt;7.00 PM (IST)&lt;/span&gt;&lt;
 /p&gt;\n&lt;p&gt;&lt;span style=&quot;font-size: 12.0pt\; line-height: 115%\; font-family: 
 &#39;Aptos&#39;\,sans-serif\; mso-ascii-theme-font: minor-latin\; mso-fareast-font
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 -bidi\; mso-ansi-language: EN-IN\; mso-fareast-language: EN-US\; mso-bidi-
 language: AR-SA\;&quot;&gt;&lt;img src=&quot;https://events.vtools.ieee.org/vtools_ui/medi
 a/display/768339de-c624-4f62-a75c-d862d54165b9&quot; alt=&quot;&quot; width=&quot;1080&quot; height
 =&quot;1080&quot;&gt;&lt;/span&gt;&lt;/p&gt;
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