BEGIN:VCALENDAR
VERSION:2.0
PRODID:IEEE vTools.Events//EN
CALSCALE:GREGORIAN
BEGIN:VTIMEZONE
TZID:Asia/Kolkata
BEGIN:STANDARD
DTSTART:19451014T230000
TZOFFSETFROM:+0630
TZOFFSETTO:+0530
TZNAME:IST
END:STANDARD
END:VTIMEZONE
BEGIN:VEVENT
DTSTAMP:20251230T084816Z
UID:48ADF6B4-26F6-4D3F-8D12-0E35B2B7EB55
DTSTART;TZID=Asia/Kolkata:20250925T140000
DTEND;TZID=Asia/Kolkata:20251230T170000
DESCRIPTION:The Analog IC Design Challenge\, conducted on 20th September 20
 25 at NIT Calicut\, was a hands-on competitive initiative under IEEE YESS
 ’25. Organized by IEEE LINK and IEEE SB NITC in collaboration with IEEE 
 CASS Kerala Chapter\, the event encouraged participants to tackle complex 
 analog circuit design problems using creativity and precision.\n\nThe chal
 lenge was designed to push students’ problem-solving abilities while fam
 iliarizing them with real-world circuit design scenarios\, providing an en
 gaging platform to innovate and test their skills.\n\nNIT calicut\, Calicu
 t\, Kerala\, India
LOCATION:NIT calicut\, Calicut\, Kerala\, India
ORGANIZER:elizabeth.george@ieee.org
SEQUENCE:12
SUMMARY:Analog IC Design Challenge – competition
URL;VALUE=URI:https://events.vtools.ieee.org/m/528036
X-ALT-DESC:Description: &lt;br /&gt;&lt;p class=&quot;MsoNormal&quot;&gt;The Analog IC Design Cha
 llenge\, conducted on 20th September 2025 at NIT Calicut\, was a hands-on 
 competitive initiative under IEEE YESS&amp;rsquo\;25. Organized by IEEE LINK a
 nd IEEE SB NITC in collaboration with IEEE CASS Kerala Chapter\, the event
  encouraged participants to tackle complex analog circuit design problems 
 using creativity and precision.&lt;/p&gt;\n&lt;p class=&quot;MsoNormal&quot;&gt;The challenge wa
 s designed to push students&amp;rsquo\; problem-solving abilities while famili
 arizing them with real-world circuit design scenarios\, providing an engag
 ing platform to innovate and test their skills.&lt;/p&gt;
END:VEVENT
END:VCALENDAR