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BEGIN:DAYLIGHT
DTSTART:20260329T020000
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DTSTART:20251026T010000
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DTSTAMP:20260210T153016Z
UID:DE0F9152-17C2-4BDE-827E-39EBC216D728
DTSTART;TZID=Europe/Dublin:20260126T160000
DTEND;TZID=Europe/Dublin:20260126T171500
DESCRIPTION:“Ultra low-power and wide bandwidth data converters: from cir
 cuit techniques to identifying the elephant in the room”\n\nAbstract –
  The talk will focus on the various paradigms of AD-converter research\, f
 rom wide bandwidth to below microwatt power. The academic Figure of Merit 
 (FoM)-race in ADCs do not capture the design challenges of the ADC’s per
 ipheral circuitry especially input signal. The talk will present some sili
 con-proven ideas for energy-efficient wide-bandwidth ADCs. Additionally\, 
 the talk will cover the evolution of various building blocks of (SAR) ADCs
  landscape leading to its current FoM below 1fJ/conv-step\, with special f
 ocus on low-noise GS/s comparators. The silicon-proven techniques presente
 d can significantly reduce the overall power consumption of the input driv
 er + ADC.\n\nSpeaker(s): Harijot Singh Bindra\, \n\nRoom: B.0.17\, Tyndall
  National Institute\, Lee Maltings\,  Dyke Parade\,\, Cork\, Cork\, Irelan
 d\, T12 R5CP\, Virtual: https://events.vtools.ieee.org/m/533519
LOCATION:Room: B.0.17\, Tyndall National Institute\, Lee Maltings\,  Dyke P
 arade\,\, Cork\, Cork\, Ireland\, T12 R5CP\, Virtual: https://events.vtool
 s.ieee.org/m/533519
ORGANIZER:daniel.ohare@mcci.ie
SEQUENCE:20
SUMMARY:SSCS UK and Ireland DL : Prof Harijot Singh Bindra : Ultra low-powe
 r and wide bandwidth data converters: from circuit techniques to identifyi
 ng the elephant in the room
URL;VALUE=URI:https://events.vtools.ieee.org/m/533519
X-ALT-DESC:Description: <br /><p class="x_MsoNormal" dir="ltr"><strong data
 -olk-copy-source="MessageBody">&ldquo\;Ultra low-power and wide bandwidth 
 data converters: from circuit techniques to identifying the elephant in th
 e room&rdquo\;</strong></p>\n<p class="x_MsoNormal">Abstract &ndash\; The 
 talk will focus on the various paradigms of AD-converter research\, from w
 ide bandwidth to below microwatt power. The academic Figure of Merit (FoM)
 -race in ADCs do not capture the design challenges of the ADC&rsquo\;s per
 ipheral circuitry especially input signal. The talk will present some sili
 con-proven ideas for energy-efficient wide-bandwidth ADCs. Additionally\, 
 the talk will cover the evolution of various building blocks of (SAR) ADCs
  landscape leading to its current FoM below 1fJ/conv-step\, with special f
 ocus on low-noise GS/s comparators. The silicon-proven techniques presente
 d can significantly reduce the overall power consumption of the input driv
 er + ADC.</p>
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