BEGIN:VCALENDAR VERSION:2.0 PRODID:IEEE vTools.Events//EN CALSCALE:GREGORIAN BEGIN:VTIMEZONE TZID:America/New_York BEGIN:DAYLIGHT DTSTART:20260308T030000 TZOFFSETFROM:-0500 TZOFFSETTO:-0400 RRULE:FREQ=YEARLY;BYDAY=2SU;BYMONTH=3 TZNAME:EDT END:DAYLIGHT BEGIN:STANDARD DTSTART:20251102T010000 TZOFFSETFROM:-0400 TZOFFSETTO:-0500 RRULE:FREQ=YEARLY;BYDAY=1SU;BYMONTH=11 TZNAME:EST END:STANDARD END:VTIMEZONE BEGIN:VEVENT DTSTAMP:20260307T030931Z UID:C7C3CFDA-A970-4FCF-BBCE-6FD2A39C5E7A DTSTART;TZID=America/New_York:20260306T090000 DTEND;TZID=America/New_York:20260306T160000 DESCRIPTION:Abstract:\n\nAs industry is starting to deploy systems based on 224Gbps/lane and growing pains are becoming more apparent\, AI companies are clamoring already for more bandwidth. A first look at 448Gbps is alrea dy highlighting the enormous challenges of running even very short links o n copper. However\, industry doesn’t seem yet ready to throw the towel o n pluggable modules as gateways to optical interconnect given the risks an d limitations of CPO.\n\nSome of the questions that will be covered:\n\n- Can we clearly articulate what are the priorities in developing the next g eneration of interconnect for AI?\n- What are the main obstacles to the ad option of short reach optics to replace the last inches of electrical conn ectivity?\n- What can we learn from advances in C2C and in particular by t he success of UCIe?\n- Does it make sense to still have pluggable modules and what is the best way to do that?\n- Was LPO a success or a bust and ca n we move forward with it?\n- What are the promises and possible pitfalls of CPO?\n\nTopics touched upon:\n\n- System level (Computing\, AI) require ments & considerations (architectural trends\, efficiency\, bw\, latency\, cost etc.)\n- Optical and electrical energy efficiency considerations\n- HW technology developments and limitations (interposer\, packaging\, conne ctors\, cables)\n- System trade offs analysis (retiming vs. linear\, vs. C PO)\n- Chiplets and co-packaging technology\n- Analysis of latest OIF deve lopment on next generation interconnect\n\nAgenda: \n\n\nRoom: GB202\, Bld g: Galbraith Building\, University of Toronto\, 35 St George Street\, Toro nto\, Ontario\, Canada LOCATION:Room: GB202\, Bldg: Galbraith Building\, University of Toronto\, 3 5 St George Street\, Toronto\, Ontario\, Canada ORGANIZER:dustin.dunwell@ieee.org SEQUENCE:38 SUMMARY:The Toronto Wireline Workshop URL;VALUE=URI:https://events.vtools.ieee.org/m/534508 X-ALT-DESC:Description: <br /><p><img src="https://events.vtools.ieee.org/v tools_ui/media/display/9dbb5899-2aaa-4341-89c7-15922046076e" width="349" h eight="465"></p>\n<p class="MsoNormal"><strong><span lang="EN-US">Abstract :</span></strong></p>\n<p class="MsoNormal"><span lang="EN-US">As industry is starting to deploy systems based on 224Gbps/lane and growing pains are becoming more apparent\, AI companies are clamoring already for more band width. A first look at 448Gbps is already highlighting the enormous challe nges of running even very short links on copper. However\, industry doesn& rsquo\;t seem yet ready to throw the towel on pluggable modules as gateway s to optical interconnect given the risks and limitations of CPO.</span></ p>\n<p class="MsoNormal"><strong><span lang="EN-US">Some of the questions that will be covered:</span></strong></p>\n<ul type="disc">\n<li class="m_ 1854202069958619504MsoListParagraph"><span lang="EN-US">Can we clearly art iculate what are the priorities in developing the next generation of inter connect for AI?</span></li>\n<li class="m_1854202069958619504MsoListParagr aph"><span lang="EN-US">What are the main obstacles to the adoption of sho rt reach optics to replace the last inches of electrical connectivity?</sp an></li>\n<li class="m_1854202069958619504MsoListParagraph"><span lang="EN -US">What can we learn from advances in C2C and in particular by the succe ss of UCIe?</span></li>\n<li class="m_1854202069958619504MsoListParagraph" ><span lang="EN-US">Does it make sense to still have pluggable modules and what is the best way to do that?</span></li>\n<li class="m_18542020699586 19504MsoListParagraph"><span lang="EN-US">Was LPO a success or a bust and can we move forward with it?</span></li>\n<li class="m_1854202069958619504 MsoListParagraph"><span lang="EN-US">What are the promises and possible pi tfalls of CPO?</span></li>\n</ul>\n<p class="MsoNormal"><strong><span lang ="EN-US">Topics touched upon:</span></strong></p>\n<ul type="disc">\n<li c lass="m_1854202069958619504MsoListParagraph"><span lang="EN-US">System lev el (Computing\, AI) requirements &amp\; considerations (architectural tren ds\, efficiency\, bw\, latency\, cost etc.)</span></li>\n<li class="m_1854 202069958619504MsoListParagraph"><span lang="EN-US">Optical and electrical energy efficiency considerations</span></li>\n<li class="m_18542020699586 19504MsoListParagraph"><span lang="EN-US">HW technology developments and l imitations (interposer\, packaging\, connectors\, cables)</span></li>\n<li class="m_1854202069958619504MsoListParagraph"><span lang="EN-US">System t rade offs analysis (retiming vs. linear\, vs. CPO)</span></li>\n<li class= "m_1854202069958619504MsoListParagraph"><span lang="EN-US">Chiplets and co -packaging technology</span></li>\n<li class="m_1854202069958619504MsoList Paragraph"><span lang="EN-US">Analysis of latest OIF development on next g eneration interconnect</span></li>\n</ul>\n<p>&nbsp\;</p><br /><br />Agend a: <br /><p><img src="https://events.vtools.ieee.org/vtools_ui/media/displ ay/0ac13c6b-b3a0-4862-94f3-9d0e9912aa22" width="360" height="480"></p> END:VEVENT END:VCALENDAR