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DTSTART:20260308T030000
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DTSTART:20261101T010000
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DTSTAMP:20260414T080156Z
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DTSTART;TZID=America/Los_Angeles:20260519T080000
DTEND;TZID=America/Los_Angeles:20260520T170000
DESCRIPTION:[]\n\n(We anticipate closing registration in late April due to 
 limited facility space\; we apologize in advance if we cannot register you
 .)\n\nThe 2026 Build-up Substrate Symposium (BUSS) convenes global leaders
  in semiconductor packaging\, substrate technology\, and AI-driven systems
 . Under the theme “Next-Gen Substrates: Accelerating Innovation in the A
 I Era\,” the symposium explores how advanced substrates are enabling tra
 nsformative breakthroughs in chiplet integration\, heterogeneous systems\,
  and Co-Packaged Optics (CPO).\nAs AI\, HPC\, and edge computing drive unp
 recedented performance demands\, next-generation substrates are emerging a
 s the foundation for scalable\, high-performance\, and energy-efficient so
 lutions. Chiplets and CPO are rapidly gaining traction as a critical enabl
 er of high-bandwidth\, low-latency interconnects\, further elevating the r
 ole of substrates in next-gen architectures.\nBUSS 2026 showcases innovati
 on across the entire ecosystem—from materials to manufacturing and integ
 ration —- highlighting how substrate advancements are powering the futur
 e of semiconductor technologies\, including the convergence of optics and 
 electronics.\n\nSEMI World Headquarters\, Milpitas\, California\, United S
 tates
LOCATION:SEMI World Headquarters\, Milpitas\, California\, United States
ORGANIZER:p.wesling@ieee.org
SEQUENCE:30
SUMMARY:Third Annual IEEE Build-Up Substrate Symposium
URL;VALUE=URI:https://events.vtools.ieee.org/m/537418
X-ALT-DESC:Description: &lt;br /&gt;&lt;p&gt;&lt;img style=&quot;float: right\;&quot; src=&quot;https://e
 vents.vtools.ieee.org/vtools_ui/media/display/249f7b44-3527-4b0d-b34b-8db0
 9ba4ae21&quot; alt=&quot;&quot; width=&quot;685&quot; height=&quot;145&quot;&gt;&lt;/p&gt;\n&lt;p&gt;&lt;em&gt;(We anticipate &lt;str
 ong&gt;closing registration&lt;/strong&gt; in late April due to limited facility sp
 ace\; we apologize in advance if we cannot register you.)&lt;/em&gt;&lt;/p&gt;\n&lt;p&gt;&amp;nb
 sp\;&lt;span style=&quot;font-size: 12pt\;&quot;&gt;The &lt;strong&gt;2026 Build-up Substrate Sy
 mposium&lt;/strong&gt; (BUSS) convenes global leaders in semiconductor packaging
 \, substrate technology\, and AI-driven systems.&amp;nbsp\; Under the theme &amp;l
 dquo\;&lt;strong&gt;Next-Gen Substrates: Accelerating Innovation in the AI Era&lt;/
 strong&gt;\,&amp;rdquo\; the symposium explores how advanced substrates are enabl
 ing transformative breakthroughs in chiplet integration\, heterogeneous sy
 stems\, and Co-Packaged Optics (CPO).&lt;br&gt;&amp;nbsp\; &amp;nbsp\; As AI\, HPC\, and
  edge computing drive unprecedented performance demands\, next-generation 
 substrates are emerging as the foundation for scalable\, high-performance\
 , and energy-efficient solutions. Chiplets and CPO are rapidly gaining tra
 ction as a critical enabler of high-bandwidth\, low-latency interconnects\
 , further elevating the role of substrates in next-gen architectures.&lt;br&gt;&amp;
 nbsp\; &amp;nbsp\; &lt;strong&gt;BUSS 2026&lt;/strong&gt; showcases innovation across the 
 entire ecosystem&amp;mdash\;from materials to manufacturing and integration &amp;m
 dash\;- highlighting how substrate advancements are powering the future of
  semiconductor technologies\, including the convergence of optics and elec
 tronics.&lt;/span&gt;&lt;/p&gt;
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