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PRODID:IEEE vTools.Events//EN
CALSCALE:GREGORIAN
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TZID:Asia/Kolkata
BEGIN:STANDARD
DTSTART:19451014T230000
TZOFFSETFROM:+0630
TZOFFSETTO:+0530
TZNAME:IST
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BEGIN:VEVENT
DTSTAMP:20260317T091350Z
UID:BE6DC7E8-8FAE-498F-86AA-C4F43BCD1600
DTSTART;TZID=Asia/Kolkata:20260228T090000
DTEND;TZID=Asia/Kolkata:20260228T170000
DESCRIPTION:The event PROTECHSUMMIT – Insight to the Emerging Tech was su
 ccessfully organized on 28 February 2026 at Sai Vidya Institute of Technol
 ogy\, Bengaluru by the IEEE CEDA Sai Vidya Institute of Technology Student
  Branch Chapter in association with the IEEE CEDA Bangalore Chapter. The e
 vent aimed to provide students with insights into emerging opportunities i
 n VLSI\, semiconductor technology\, hardware design\, and deep-tech career
 s\, while strengthening the connection between academia and industry.\n\nT
 he event began with registration from 09:00 AM to 09:30 AM\, followed by t
 he inauguration ceremony. The invocation song was performed by Pradnya Vir
 abhadrapppa Nuchhi\, Department of ECE\, Vice Chair of the IEEE SVIT CEDA 
 Student Branch Chapter.\nDr. Venkatesha M\, Faculty Advisor IEEE CEDA SVIT
  SBC\, addressed the participants\, followed by a message from Dr. Manjuna
 th T N\, Principal of SVIT. The session concluded with an overview of CEDA
  delivered by Dr. Sajal Mittal\, Chair of the IEEE CEDA Bangalore Chapter\
 , highlighting the role of IEEE CEDA in advancing electronic design automa
 tion and supporting student innovation.\n\nThe event witnessed 154 partici
 pants\, which included students from Various colleges\, Industry professio
 nals\, IEEE Sai Vidya CEDA Student Branch volunteers\, CEDA ExeCom Members
  and event coordinators who actively contributed to the success of the pro
 gram.\n\nThe event began with an insightful CEDA overview session by Mr. S
 ajal Mittal\, Chair\, IEEE CEDA Bangalore Chapter and Associate Technical 
 Director at Samsung Semiconductor. He introduced students to the world of 
 chip design and design automation\, explaining how semiconductor technolog
 ies power modern electronic systems.\n\nThis was followed by an engaging t
 alk by Mr. Aloke Das\, Founder of Lab and Lectures\, who discussed the glo
 bal VLSI and semiconductor landscape. His session provided valuable insigh
 ts into future industry trends\, essential technical skills and common cha
 llenges faced by fresh graduates entering the semiconductor field.\n\nA pr
 actical session on resume building and career preparation was delivered by
  Ms. Vibhuti Prajapati\, Professional from Truechip Solutions Pvt. Ltd.\, 
 where students learned how to strategically design resumes and effectively
  present their skills to recruiters in the semiconductor industry.\n\nAnot
 her informative session was conducted by Mr. Pranav Kashide\, Researcher a
 t the University of Illinois Urbana-Champaign (USA)\, who shared valuable 
 guidance on technical interview preparation\, research exposure\, and glob
 al opportunities in semiconductor and VLSI domains.\n\nOne of the major hi
 ghlights of the event was the panel discussion titled “When Industry Met
  the Institute.” The panel consisted of distinguished experts from leadi
 ng semiconductor organizations:\n\n-\nMr. Sajal Mittal – Chair\, IEEE CE
 DA Bangalore Chapter &amp; Associate Technical Director\, Samsung Semiconducto
 r\n\n-\nMr. Aloke Das – Founder\, Lab and Lectures\n\n-\nMr. Abhishek Ku
 mar Singhania – Qualcomm\n\n-\nMr. Suprateek Shukla – Micron Technolog
 y\n\n-\nMr. Sainath Indana – Synopsys Inc.\n\n-\nMs. Vibhuti Prajapati 
 – Truechip Solutions Pvt. Ltd.\n\n-\nMr. Pranav Kashide – University o
 f Illinois Urbana-Champaign (USA)\n\n-\nDr. Vimala P – Faculty Member\, 
 Sai Vidya Institute of Technology\n\n-\nProf. Nayana K- Faculty Expert\, M
 oderator\n\n-\nMs. Varsha H N - Moderator\n\nThe panel discussion focused 
 on key industry topics such as the impact of Artificial Intelligence in ch
 ip design\, advancements in low-power VLSI design\, industry-relevant skil
 ls\, and career pathways in both research and semiconductor industries.\n\
 nThe event concluded with an interactive mentorship session\, where studen
 ts had the opportunity to directly interact with industry experts and seek
  guidance regarding career opportunities\, skill development\, and the roa
 dmap for entering the semiconductor domain.\n\n[]	[]\n[]	[]\n\nAgenda: \nT
 ime\n\nSession\n\nDetails\n\n09:00 – 09:30 AM\n\nRegistration\n\nPartici
 pant registration &amp; welcome kit distribution\n\n09:30 – 09:40 AM\n\nInau
 guration\n\nInvocation\, Welcome Address\, Lamp Lighting\n\n09:40AM – 09
 :45AM\n\nAddress by Faculty Advisor\, IEEE CEDA SAI VIDYA SBC\n\nDr. Venka
 tesha M\, Faculty Advisor IEEECEDA\, Professor and HOD ECE\n\n09:45AM – 
 09:50AM\n\nAdress by Principal\n\nDr. Manjunath T N\, Principal\, Sai Vidy
 a Institute of Technology\n\n09:50 - 10:00AM\n\nAbout CEDA\n\nCEDA Overvie
 w : Dr. Sajal Mittal\, Chair IEEE CEDA BANGALORE Chapter\n\n10:00 – 11:0
 0 AM\n\nIndustry Landscape\n\nMr. Alok Das\, Founder Lab and Lectures\, Pa
 st Chair IEEE CASS Bangalore Chapter\n\n11:00AM – 11:10AM\n\nTea Break-\
 n\n11:10 – 12:05 PM\n\nTips &amp; Tricks to Resume Building\n\nVibhuti Praja
 pati\n\nVLSI Sr. Lead Recruiter at Truechip\n\n12:05 – 1:00 PM\n\nHow to
  Prepare for Dream Job Interview\n\nPranav Kashide\, Research Associate at
  ETRL - UIUC \, University of Illinois Urbana-Champaign\n\n01:00 – 02:00
  PM\n\nLunch Break\n\n02:00 – 03:05 PM\n\nPanel Discussion\n\nPanel Memb
 ers :\n\n-\nAloke Das\, Founder Lab and Lectures\n\n-\nSajal Mittal\, Asso
 ciATE Director\, SAMSUNG Electronics\n\n-\nAbhishek Kumar Singhania – Qu
 alcomm\n\n-\nSuprateek Shukla – Micron Technology\n\n-\nSainath Indana 
 – Synopsys Inc\n\n-\nVibhuti Prajapati – True Chip\n\n-\nPranav Kashid
 e - Research Associate at ETRL - UIUC\n\n-\nDr. Vimala P – Professsor\, 
 Dayanand Sagar College of Engineering\, Execom Member IEEE CEDA Bangalore 
 Chapter\n\n-\nProf. Nayana K- Faculty Expert\, Moderator\n\n-\nMs. Varsha 
 H N - Moderator\n\n3:05PM – 3:15 PM\n\nFORMATION OFGROUPS FOR MENTORSHIP
  SESSION\n&amp;\nHIGH TEA\n\n03:15 – 04:30 PM\n\nIndustry Panel\nMember-Stud
 ent\nMentorship Session\n\nGroup mentoring (15-20 students/group)\nwith\n0
 8 mentors -07 Parallel Classrooms\n\nA-BLOCK\n\nA-101-107\, 109-112\n\n04:
 30 - 05:00 PM\n\nValedictory &amp; Conclusion\n\nVote of Thanks\n\nSwami Vivek
 ananda Auditorium\, Sai Vidya Institute of Technology\, Yelahanka\, Rajanu
 kunte\, Bengaluru\, Karnataka\, India\, 560119
LOCATION:Swami Vivekananda Auditorium\, Sai Vidya Institute of Technology\,
  Yelahanka\, Rajanukunte\, Bengaluru\, Karnataka\, India\, 560119
ORGANIZER:avamsikrishna@ieee.org
SEQUENCE:4
SUMMARY:ProTech Summit – Insight to the Emerging Tech
URL;VALUE=URI:https://events.vtools.ieee.org/m/540130
X-ALT-DESC:Description: &lt;br /&gt;&lt;p dir=&quot;ltr&quot;&gt;The event PROTECHSUMMIT &amp;ndash\;
  Insight to the Emerging Tech was successfully organized on 28 February 20
 26 at Sai Vidya Institute of Technology\, Bengaluru by the IEEE CEDA Sai V
 idya Institute of Technology Student Branch Chapter in association with th
 e IEEE CEDA Bangalore Chapter. The event aimed to provide students with in
 sights into emerging opportunities in VLSI\, semiconductor technology\, ha
 rdware design\, and deep-tech careers\, while strengthening the connection
  between academia and industry.&lt;/p&gt;\n&lt;p dir=&quot;ltr&quot;&gt;The event began with reg
 istration from 09:00 AM to 09:30 AM\, followed by the inauguration ceremon
 y. The invocation song was performed by Pradnya Virabhadrapppa Nuchhi\, De
 partment of ECE\, Vice Chair of the IEEE SVIT CEDA Student Branch Chapter.
  &lt;br&gt;Dr. Venkatesha M\, Faculty Advisor IEEE CEDA SVIT SBC\, addressed the
  participants\, followed by a message from Dr. Manjunath T N\, Principal o
 f SVIT. The session concluded with an overview of CEDA delivered by Dr. Sa
 jal Mittal\, Chair of the IEEE CEDA Bangalore Chapter\, highlighting the r
 ole of IEEE CEDA in advancing electronic design automation and supporting 
 student innovation.&lt;/p&gt;\n&lt;p dir=&quot;ltr&quot;&gt;The event witnessed 154 participants
 \, which included students from Various colleges\, Industry professionals\
 , IEEE Sai Vidya CEDA Student Branch volunteers\, CEDA ExeCom Members and 
 event coordinators who actively contributed to the success of the program.
 &lt;/p&gt;\n&lt;p dir=&quot;ltr&quot;&gt;The event began with an insightful CEDA overview sessio
 n by Mr. Sajal Mittal\, Chair\, IEEE CEDA Bangalore Chapter and Associate 
 Technical Director at Samsung Semiconductor. He introduced students to the
  world of chip design and design automation\, explaining how semiconductor
  technologies power modern electronic systems.&lt;/p&gt;\n&lt;p dir=&quot;ltr&quot;&gt;This was 
 followed by an engaging talk by Mr. Aloke Das\, Founder of Lab and Lecture
 s\, who discussed the global VLSI and semiconductor landscape. His session
  provided valuable insights into future industry trends\, essential techni
 cal skills and common challenges faced by fresh graduates entering the sem
 iconductor field.&lt;/p&gt;\n&lt;p dir=&quot;ltr&quot;&gt;A practical session on resume building
  and career preparation was delivered by Ms. Vibhuti Prajapati\, Professio
 nal from Truechip Solutions Pvt. Ltd.\, where students learned how to stra
 tegically design resumes and effectively present their skills to recruiter
 s in the semiconductor industry.&lt;/p&gt;\n&lt;p dir=&quot;ltr&quot;&gt;Another informative ses
 sion was conducted by Mr. Pranav Kashide\, Researcher at the University of
  Illinois Urbana-Champaign (USA)\, who shared valuable guidance on technic
 al interview preparation\, research exposure\, and global opportunities in
  semiconductor and VLSI domains.&lt;/p&gt;\n&lt;p dir=&quot;ltr&quot;&gt;One of the major highli
 ghts of the event was the panel discussion titled &amp;ldquo\;When Industry Me
 t the Institute.&amp;rdquo\; The panel consisted of distinguished experts from
  leading semiconductor organizations:&lt;/p&gt;\n&lt;ol&gt;\n&lt;li dir=&quot;ltr&quot; aria-level=
 &quot;1&quot;&gt;\n&lt;p dir=&quot;ltr&quot; role=&quot;presentation&quot;&gt;Mr. Sajal Mittal &amp;ndash\; Chair\, I
 EEE CEDA Bangalore Chapter &amp;amp\; Associate Technical Director\, Samsung S
 emiconductor&lt;/p&gt;\n&lt;/li&gt;\n&lt;li dir=&quot;ltr&quot; aria-level=&quot;1&quot;&gt;\n&lt;p dir=&quot;ltr&quot; role=
 &quot;presentation&quot;&gt;Mr. Aloke Das &amp;ndash\; Founder\, Lab and Lectures&lt;/p&gt;\n&lt;/li
 &gt;\n&lt;li dir=&quot;ltr&quot; aria-level=&quot;1&quot;&gt;\n&lt;p dir=&quot;ltr&quot; role=&quot;presentation&quot;&gt;Mr. Abh
 ishek Kumar Singhania &amp;ndash\; Qualcomm&lt;/p&gt;\n&lt;/li&gt;\n&lt;li dir=&quot;ltr&quot; aria-lev
 el=&quot;1&quot;&gt;\n&lt;p dir=&quot;ltr&quot; role=&quot;presentation&quot;&gt;Mr. Suprateek Shukla &amp;ndash\; Mi
 cron Technology&lt;/p&gt;\n&lt;/li&gt;\n&lt;li dir=&quot;ltr&quot; aria-level=&quot;1&quot;&gt;\n&lt;p dir=&quot;ltr&quot; ro
 le=&quot;presentation&quot;&gt;Mr. Sainath Indana &amp;ndash\; Synopsys Inc.&lt;/p&gt;\n&lt;/li&gt;\n&lt;l
 i dir=&quot;ltr&quot; aria-level=&quot;1&quot;&gt;\n&lt;p dir=&quot;ltr&quot; role=&quot;presentation&quot;&gt;Ms. Vibhuti 
 Prajapati &amp;ndash\; Truechip Solutions Pvt. Ltd.&lt;/p&gt;\n&lt;/li&gt;\n&lt;li dir=&quot;ltr&quot; 
 aria-level=&quot;1&quot;&gt;\n&lt;p dir=&quot;ltr&quot; role=&quot;presentation&quot;&gt;Mr. Pranav Kashide &amp;ndas
 h\; University of Illinois Urbana-Champaign (USA)&lt;/p&gt;\n&lt;/li&gt;\n&lt;li dir=&quot;ltr
 &quot; aria-level=&quot;1&quot;&gt;\n&lt;p dir=&quot;ltr&quot; role=&quot;presentation&quot;&gt;Dr. Vimala P &amp;ndash\; 
 Faculty Member\, Sai Vidya Institute of Technology&lt;/p&gt;\n&lt;/li&gt;\n&lt;li dir=&quot;lt
 r&quot; aria-level=&quot;1&quot;&gt;\n&lt;p dir=&quot;ltr&quot; role=&quot;presentation&quot;&gt;Prof. Nayana K- Facul
 ty Expert\, Moderator&lt;/p&gt;\n&lt;/li&gt;\n&lt;li dir=&quot;ltr&quot; aria-level=&quot;1&quot;&gt;\n&lt;p dir=&quot;l
 tr&quot; role=&quot;presentation&quot;&gt;Ms. Varsha H N - Moderator&lt;/p&gt;\n&lt;/li&gt;\n&lt;/ol&gt;\n&lt;p d
 ir=&quot;ltr&quot;&gt;The panel discussion focused on key industry topics such as the i
 mpact of Artificial Intelligence in chip design\, advancements in low-powe
 r VLSI design\, industry-relevant skills\, and career pathways in both res
 earch and semiconductor industries.&lt;/p&gt;\n&lt;p dir=&quot;ltr&quot;&gt;The event concluded 
 with an interactive mentorship session\, where students had the opportunit
 y to directly interact with industry experts and seek guidance regarding c
 areer opportunities\, skill development\, and the roadmap for entering the
  semiconductor domain.&lt;/p&gt;\n&lt;table style=&quot;border-collapse: collapse\; widt
 h: 100%\; height: 44.7812px\;&quot; border=&quot;1&quot;&gt;&lt;colgroup&gt;&lt;col style=&quot;width: 49.
 9513%\;&quot;&gt;&lt;col style=&quot;width: 49.9513%\;&quot;&gt;&lt;/colgroup&gt;\n&lt;tbody&gt;\n&lt;tr style=&quot;h
 eight: 22.3906px\;&quot;&gt;\n&lt;td style=&quot;height: 22.3906px\; text-align: center\;&quot;
 &gt;&lt;img src=&quot;https://events.vtools.ieee.org/vtools_ui/media/display/a7d5e39c
 -517a-4655-9eb3-1f2c14ee05ea&quot; alt=&quot;&quot; width=&quot;464&quot; height=&quot;261&quot;&gt;&lt;/td&gt;\n&lt;td s
 tyle=&quot;height: 22.3906px\; text-align: center\;&quot;&gt;&lt;img src=&quot;https://events.v
 tools.ieee.org/vtools_ui/media/display/23a642d3-3005-48eb-8760-325969933a5
 8&quot; alt=&quot;&quot; width=&quot;457&quot; height=&quot;257&quot;&gt;&lt;/td&gt;\n&lt;/tr&gt;\n&lt;tr style=&quot;height: 22.390
 6px\;&quot;&gt;\n&lt;td style=&quot;height: 22.3906px\; text-align: center\;&quot;&gt;&lt;img src=&quot;ht
 tps://events.vtools.ieee.org/vtools_ui/media/display/83d05b1a-3abf-4826-86
 54-f03bb5393865&quot; alt=&quot;&quot; width=&quot;469&quot; height=&quot;264&quot;&gt;&lt;/td&gt;\n&lt;td style=&quot;height:
  22.3906px\; text-align: center\;&quot;&gt;&lt;img src=&quot;https://events.vtools.ieee.or
 g/vtools_ui/media/display/f68c549e-a346-48ed-83cd-be6ddfb37c1e&quot; alt=&quot;&quot; wid
 th=&quot;469&quot; height=&quot;264&quot;&gt;&lt;/td&gt;\n&lt;/tr&gt;\n&lt;/tbody&gt;\n&lt;/table&gt;\n&lt;p id=&quot;p-rc_c9d1df
 974cb0938f-38&quot; data-path-to-node=&quot;4&quot;&gt;&lt;/p&gt;&lt;br /&gt;&lt;br /&gt;Agenda: &lt;br /&gt;&lt;div di
 r=&quot;ltr&quot; align=&quot;left&quot;&gt;\n&lt;table style=&quot;width: 68.0623%\; height: 1733.97px\;
 &quot;&gt;&lt;colgroup&gt;&lt;col style=&quot;width: 22.4607%\;&quot; width=&quot;157&quot;&gt;&lt;col style=&quot;width: 
 27.0386%\;&quot; width=&quot;189&quot;&gt;&lt;col style=&quot;width: 50.3577%\;&quot; width=&quot;352&quot;&gt;&lt;/colgr
 oup&gt;\n&lt;tbody&gt;\n&lt;tr style=&quot;height: 54.3906px\;&quot;&gt;\n&lt;td style=&quot;height: 54.390
 6px\;&quot;&gt;\n&lt;p dir=&quot;ltr&quot; style=&quot;text-align: center\;&quot;&gt;Time&lt;/p&gt;\n&lt;/td&gt;\n&lt;td st
 yle=&quot;text-align: center\; height: 54.3906px\;&quot;&gt;\n&lt;p dir=&quot;ltr&quot;&gt;Session&lt;/p&gt;\
 n&lt;/td&gt;\n&lt;td style=&quot;text-align: center\; height: 54.3906px\;&quot;&gt;\n&lt;p dir=&quot;ltr
 &quot;&gt;Details&lt;/p&gt;\n&lt;/td&gt;\n&lt;/tr&gt;\n&lt;tr style=&quot;text-align: center\; height: 76.78
 12px\;&quot;&gt;\n&lt;td style=&quot;height: 76.7812px\;&quot;&gt;\n&lt;p dir=&quot;ltr&quot;&gt;09:00 &amp;ndash\; 09
 :30 AM&lt;/p&gt;\n&lt;/td&gt;\n&lt;td style=&quot;height: 76.7812px\;&quot;&gt;\n&lt;p dir=&quot;ltr&quot;&gt;Registra
 tion&lt;/p&gt;\n&lt;/td&gt;\n&lt;td style=&quot;height: 76.7812px\;&quot;&gt;\n&lt;p dir=&quot;ltr&quot;&gt;Participan
 t registration &amp;amp\; welcome kit distribution&lt;/p&gt;\n&lt;/td&gt;\n&lt;/tr&gt;\n&lt;tr styl
 e=&quot;text-align: center\; height: 54.3906px\;&quot;&gt;\n&lt;td style=&quot;height: 54.3906p
 x\;&quot;&gt;\n&lt;p dir=&quot;ltr&quot;&gt;09:30 &amp;ndash\; 09:40 AM&lt;/p&gt;\n&lt;/td&gt;\n&lt;td style=&quot;height:
  54.3906px\;&quot;&gt;\n&lt;p dir=&quot;ltr&quot;&gt;Inauguration&lt;/p&gt;\n&lt;/td&gt;\n&lt;td style=&quot;height: 5
 4.3906px\;&quot;&gt;\n&lt;p dir=&quot;ltr&quot;&gt;Invocation\, Welcome Address\, Lamp Lighting&lt;/p
 &gt;\n&lt;/td&gt;\n&lt;/tr&gt;\n&lt;tr style=&quot;text-align: center\; height: 99.1719px\;&quot;&gt;\n&lt;t
 d style=&quot;height: 99.1719px\;&quot;&gt;\n&lt;p dir=&quot;ltr&quot;&gt;09:40AM &amp;ndash\; 09:45AM&lt;/p&gt;\
 n&lt;/td&gt;\n&lt;td style=&quot;height: 99.1719px\;&quot;&gt;\n&lt;p dir=&quot;ltr&quot;&gt;Address by Faculty 
 Advisor\, IEEE CEDA SAI VIDYA SBC&lt;/p&gt;\n&lt;/td&gt;\n&lt;td style=&quot;height: 99.1719px
 \;&quot;&gt;\n&lt;p dir=&quot;ltr&quot;&gt;Dr. Venkatesha M\, Faculty Advisor IEEECEDA\, Professor
  and HOD ECE&lt;/p&gt;\n&lt;/td&gt;\n&lt;/tr&gt;\n&lt;tr style=&quot;text-align: center\; height: 76
 .7812px\;&quot;&gt;\n&lt;td style=&quot;height: 76.7812px\;&quot;&gt;\n&lt;p dir=&quot;ltr&quot;&gt;09:45AM &amp;ndash
 \; 09:50AM&lt;/p&gt;\n&lt;/td&gt;\n&lt;td style=&quot;height: 76.7812px\;&quot;&gt;\n&lt;p dir=&quot;ltr&quot;&gt;Adre
 ss by Principal&lt;/p&gt;\n&lt;/td&gt;\n&lt;td style=&quot;height: 76.7812px\;&quot;&gt;\n&lt;p dir=&quot;ltr&quot;
 &gt;Dr. Manjunath T N\, Principal\, Sai Vidya Institute of Technology&lt;/p&gt;\n&lt;/
 td&gt;\n&lt;/tr&gt;\n&lt;tr style=&quot;text-align: center\; height: 76.7812px\;&quot;&gt;\n&lt;td sty
 le=&quot;height: 76.7812px\;&quot;&gt;\n&lt;p dir=&quot;ltr&quot;&gt;09:50 - 10:00AM&lt;/p&gt;\n&lt;/td&gt;\n&lt;td st
 yle=&quot;height: 76.7812px\;&quot;&gt;\n&lt;p dir=&quot;ltr&quot;&gt;About CEDA&lt;/p&gt;\n&lt;/td&gt;\n&lt;td style=
 &quot;height: 76.7812px\;&quot;&gt;\n&lt;p dir=&quot;ltr&quot;&gt;CEDA Overview : Dr. Sajal Mittal\, Ch
 air IEEE CEDA BANGALORE Chapter&lt;/p&gt;\n&lt;/td&gt;\n&lt;/tr&gt;\n&lt;tr style=&quot;text-align: 
 center\; height: 76.7812px\;&quot;&gt;\n&lt;td style=&quot;height: 76.7812px\;&quot;&gt;\n&lt;p dir=&quot;
 ltr&quot;&gt;10:00 &amp;ndash\; 11:00 AM&lt;/p&gt;\n&lt;/td&gt;\n&lt;td style=&quot;height: 76.7812px\;&quot;&gt;\
 n&lt;p dir=&quot;ltr&quot;&gt;Industry Landscape&lt;/p&gt;\n&lt;/td&gt;\n&lt;td style=&quot;height: 76.7812px\
 ;&quot;&gt;\n&lt;p dir=&quot;ltr&quot;&gt;Mr. Alok Das\, Founder Lab and Lectures\, Past Chair IEE
 E CASS Bangalore Chapter&lt;/p&gt;\n&lt;/td&gt;\n&lt;/tr&gt;\n&lt;tr style=&quot;text-align: center\
 ; height: 54.3906px\;&quot;&gt;\n&lt;td style=&quot;height: 54.3906px\;&quot;&gt;\n&lt;p dir=&quot;ltr&quot;&gt;11
 :00AM &amp;ndash\; 11:10AM&lt;/p&gt;\n&lt;/td&gt;\n&lt;td style=&quot;height: 54.3906px\;&quot; colspan
 =&quot;2&quot;&gt;\n&lt;p dir=&quot;ltr&quot;&gt;Tea Break-&lt;/p&gt;\n&lt;/td&gt;\n&lt;/tr&gt;\n&lt;tr style=&quot;text-align: c
 enter\; height: 92.7812px\;&quot;&gt;\n&lt;td style=&quot;height: 92.7812px\;&quot;&gt;\n&lt;p dir=&quot;l
 tr&quot;&gt;11:10 &amp;ndash\; 12:05 PM&lt;/p&gt;\n&lt;/td&gt;\n&lt;td style=&quot;height: 92.7812px\;&quot;&gt;\n
 &lt;p dir=&quot;ltr&quot;&gt;Tips &amp;amp\; Tricks to Resume Building&lt;/p&gt;\n&lt;/td&gt;\n&lt;td style=&quot;
 height: 92.7812px\;&quot;&gt;\n&lt;p dir=&quot;ltr&quot;&gt;Vibhuti Prajapati&amp;nbsp\;&lt;/p&gt;\n&lt;p dir=&quot;
 ltr&quot;&gt;VLSI Sr. Lead Recruiter at Truechip&lt;/p&gt;\n&lt;/td&gt;\n&lt;/tr&gt;\n&lt;tr style=&quot;tex
 t-align: center\; height: 76.7812px\;&quot;&gt;\n&lt;td style=&quot;height: 76.7812px\;&quot;&gt;\
 n&lt;p dir=&quot;ltr&quot;&gt;12:05 &amp;ndash\; 1:00 PM&lt;/p&gt;\n&lt;/td&gt;\n&lt;td style=&quot;height: 76.781
 2px\;&quot;&gt;\n&lt;p dir=&quot;ltr&quot;&gt;How to Prepare for Dream Job Interview&lt;/p&gt;\n&lt;/td&gt;\n&lt;
 td style=&quot;height: 76.7812px\;&quot;&gt;\n&lt;p dir=&quot;ltr&quot;&gt;Pranav Kashide\, Research As
 sociate at ETRL - UIUC \, University of Illinois Urbana-Champaign&lt;/p&gt;\n&lt;/t
 d&gt;\n&lt;/tr&gt;\n&lt;tr style=&quot;text-align: center\; height: 54.3906px\;&quot;&gt;\n&lt;td styl
 e=&quot;height: 54.3906px\;&quot;&gt;\n&lt;p dir=&quot;ltr&quot;&gt;01:00 &amp;ndash\; 02:00 PM&lt;/p&gt;\n&lt;/td&gt;\
 n&lt;td style=&quot;height: 54.3906px\;&quot; colspan=&quot;2&quot;&gt;\n&lt;p dir=&quot;ltr&quot;&gt;Lunch Break&lt;/p
 &gt;\n&lt;/td&gt;\n&lt;/tr&gt;\n&lt;tr style=&quot;text-align: center\; height: 527.859px\;&quot;&gt;\n&lt;t
 d style=&quot;height: 527.859px\;&quot;&gt;\n&lt;p dir=&quot;ltr&quot;&gt;02:00 &amp;ndash\; 03:05 PM&lt;/p&gt;\n
 &lt;/td&gt;\n&lt;td style=&quot;height: 527.859px\;&quot;&gt;\n&lt;p dir=&quot;ltr&quot;&gt;Panel Discussion&lt;/p&gt;
 \n&lt;/td&gt;\n&lt;td style=&quot;height: 527.859px\;&quot;&gt;\n&lt;p dir=&quot;ltr&quot;&gt;Panel Members :&amp;nb
 sp\;&lt;/p&gt;\n&lt;ol&gt;\n&lt;li dir=&quot;ltr&quot; aria-level=&quot;1&quot;&gt;\n&lt;p dir=&quot;ltr&quot; role=&quot;presenta
 tion&quot;&gt;Aloke Das\, Founder Lab and Lectures&lt;/p&gt;\n&lt;/li&gt;\n&lt;li dir=&quot;ltr&quot; aria-
 level=&quot;1&quot;&gt;\n&lt;p dir=&quot;ltr&quot; role=&quot;presentation&quot;&gt;Sajal Mittal\, AssociATE Dire
 ctor\, SAMSUNG Electronics&amp;nbsp\;&lt;/p&gt;\n&lt;/li&gt;\n&lt;li dir=&quot;ltr&quot; aria-level=&quot;1&quot;
 &gt;\n&lt;p dir=&quot;ltr&quot; role=&quot;presentation&quot;&gt;Abhishek Kumar Singhania &amp;ndash\; Qual
 comm&lt;/p&gt;\n&lt;/li&gt;\n&lt;li dir=&quot;ltr&quot; aria-level=&quot;1&quot;&gt;\n&lt;p dir=&quot;ltr&quot; role=&quot;present
 ation&quot;&gt;Suprateek Shukla &amp;ndash\; Micron Technology&lt;/p&gt;\n&lt;/li&gt;\n&lt;li dir=&quot;lt
 r&quot; aria-level=&quot;1&quot;&gt;\n&lt;p dir=&quot;ltr&quot; role=&quot;presentation&quot;&gt;Sainath Indana &amp;ndash
 \; Synopsys Inc&lt;/p&gt;\n&lt;/li&gt;\n&lt;li dir=&quot;ltr&quot; aria-level=&quot;1&quot;&gt;\n&lt;p dir=&quot;ltr&quot; ro
 le=&quot;presentation&quot;&gt;Vibhuti Prajapati &amp;ndash\; True Chip&lt;/p&gt;\n&lt;/li&gt;\n&lt;li dir
 =&quot;ltr&quot; aria-level=&quot;1&quot;&gt;\n&lt;p dir=&quot;ltr&quot; role=&quot;presentation&quot;&gt;Pranav Kashide - 
 Research Associate at ETRL - UIUC&lt;/p&gt;\n&lt;/li&gt;\n&lt;li dir=&quot;ltr&quot; aria-level=&quot;1&quot;
 &gt;\n&lt;p dir=&quot;ltr&quot; role=&quot;presentation&quot;&gt;Dr. Vimala P &amp;ndash\; Professsor\, Day
 anand Sagar College of Engineering\, Execom Member IEEE CEDA Bangalore Cha
 pter&lt;/p&gt;\n&lt;/li&gt;\n&lt;li dir=&quot;ltr&quot; aria-level=&quot;1&quot;&gt;\n&lt;p dir=&quot;ltr&quot; role=&quot;present
 ation&quot;&gt;Prof. Nayana K- Faculty Expert\, Moderator&lt;/p&gt;\n&lt;/li&gt;\n&lt;li dir=&quot;ltr
 &quot; aria-level=&quot;1&quot;&gt;\n&lt;p dir=&quot;ltr&quot; role=&quot;presentation&quot;&gt;Ms. Varsha H N - Moder
 ator&lt;/p&gt;\n&lt;/li&gt;\n&lt;/ol&gt;\n&lt;/td&gt;\n&lt;/tr&gt;\n&lt;tr style=&quot;text-align: center\; heig
 ht: 99.1719px\;&quot;&gt;\n&lt;td style=&quot;height: 99.1719px\;&quot;&gt;\n&lt;p dir=&quot;ltr&quot;&gt;3:05PM &amp;
 ndash\; 3:15 PM&lt;/p&gt;\n&lt;/td&gt;\n&lt;td style=&quot;height: 99.1719px\;&quot; colspan=&quot;2&quot;&gt;\n
 &lt;p dir=&quot;ltr&quot;&gt;FORMATION OFGROUPS FOR MENTORSHIP SESSION &lt;br&gt;&amp;amp\; &lt;br&gt;HIGH
  TEA&amp;nbsp\;&lt;/p&gt;\n&lt;/td&gt;\n&lt;/tr&gt;\n&lt;tr style=&quot;text-align: center\; height: 220
 .734px\;&quot;&gt;\n&lt;td style=&quot;height: 220.734px\;&quot;&gt;\n&lt;p dir=&quot;ltr&quot;&gt;03:15 &amp;ndash\; 
 04:30 PM&lt;/p&gt;\n&lt;/td&gt;\n&lt;td style=&quot;height: 220.734px\;&quot;&gt;\n&lt;p dir=&quot;ltr&quot;&gt;Indust
 ry Panel &lt;br&gt;Member-Student&lt;br&gt;Mentorship Session&lt;/p&gt;\n&lt;/td&gt;\n&lt;td style=&quot;h
 eight: 220.734px\;&quot;&gt;\n&lt;p dir=&quot;ltr&quot;&gt;Group mentoring (15-20 students/group) 
 &lt;br&gt;with &lt;br&gt;08 mentors -07 Parallel Classrooms &lt;br&gt;&lt;br&gt;&lt;/p&gt;\n&lt;p dir=&quot;ltr&quot;
 &gt;A-BLOCK&amp;nbsp\;&lt;/p&gt;\n&lt;p dir=&quot;ltr&quot;&gt;&lt;br&gt;A-101-107\, 109-112&amp;nbsp\;&lt;/p&gt;\n&lt;/td
 &gt;\n&lt;/tr&gt;\n&lt;tr style=&quot;height: 92.7812px\;&quot;&gt;\n&lt;td style=&quot;text-align: center\
 ; height: 92.7812px\;&quot;&gt;\n&lt;p dir=&quot;ltr&quot;&gt;04:30 - 05:00 PM&lt;/p&gt;\n&lt;/td&gt;\n&lt;td sty
 le=&quot;height: 92.7812px\;&quot; colspan=&quot;2&quot;&gt;\n&lt;p dir=&quot;ltr&quot; style=&quot;text-align: cen
 ter\;&quot;&gt;Valedictory &amp;amp\; Conclusion&lt;/p&gt;\n&lt;p dir=&quot;ltr&quot; style=&quot;text-align: 
 center\;&quot;&gt;Vote of Thanks&lt;/p&gt;\n&lt;/td&gt;\n&lt;/tr&gt;\n&lt;/tbody&gt;\n&lt;/table&gt;\n&lt;/div&gt;\n&lt;p
 &gt;&amp;nbsp\;&lt;/p&gt;
END:VEVENT
END:VCALENDAR