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PRODID:IEEE vTools.Events//EN
CALSCALE:GREGORIAN
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TZID:Asia/Kolkata
BEGIN:STANDARD
DTSTART:19451014T230000
TZOFFSETFROM:+0630
TZOFFSETTO:+0530
TZNAME:IST
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BEGIN:VEVENT
DTSTAMP:20260709T022459Z
UID:F55DDD5A-7EF0-4CB0-A735-ECAC1E6646BF
DTSTART;TZID=Asia/Kolkata:20260314T080000
DTEND;TZID=Asia/Kolkata:20260315T120000
DESCRIPTION:ChipVerse&#39;26 was a two-day hackathon held on 14th &amp; 15th March 
 2026\, organized by The Point Seven Club in association with the IEEE CEDA
  DSCE Student Chapter. The event aimed to bridge the gap between theoretic
 al knowledge and real-world application by testing students&#39; practical und
 erstanding of core electronics concepts\, including analytical thinking\, 
 debugging techniques\, and circuit simulation proficiency.\n\nThe competit
 ion received 141 abstract registrations across three domains: Embedded Sys
 tems (67)\, Digital VLSI (51)\, and Analog VLSI (23). Following a rigorous
  abstract screening process\, eight teams per domain were shortlisted for 
 the final hackathon. Day one focused on initial prototype development and 
 mentorship\, where participants received technical guidance from industry 
 experts from Texas Instruments\, Renesas\, and Samsung. Day two involved f
 inal evaluations by a distinguished judging panel\, followed by a valedict
 ory ceremony. Winners from each domain were awarded a prize of ₹10\,000/
 -. The event successfully promoted hands-on learning\, innovation\, and te
 chnical excellence among students.\n\n[]	[]	[]\n[]	[]\n[]	[]\n\nAgenda: \n
 Day-1 (14.03.2026)\n\n10:00 AM – 10:30 AM: Inauguration Ceremony &amp; Welco
 me Address\n\nChief Guests: Dr. Suma V (Vice Principal)\, Dr. Shobha K R (
 HOD\, ECE)\n\n10:30 AM – 2:30 PM: Initial Prototype Development (Day 1)\
 n\nParticipants worked on domain-specific projects in allocated laboratori
 es\n\n2:30 PM – 4:00 PM: Mentorship Review Session\n\nMentors: Dr. Shobh
 a K R\, Mr. Vishal (Embedded)\; Mr. Sumukh (Ex-Renesas)\, Mr. Parvez (TI)\
 , Mrs. Rajleela (Samsung) (Digital VLSI)\; Mr. Lakshmanan (Ex-TI)\, Mr. Dh
 irendra Rao (TI)\, Ms. Namitha Pavan (TI) (Analog VLSI)\n\nDay-2 (15.03.20
 26)\n\n10:00 AM – 3:00 PM: Final Project Evaluation &amp; Judging\n\nJudges:
  Dr. Shobha K R\, Mr. Prajwal Hegde (SL Corporations)\, Mr. Vamsi Krishna 
 (Comedkares) (Embedded)\; Mr. Sumukh (Ex-Renesas)\, Mr. Parvez (TI) (Digit
 al VLSI)\; Mr. Lakshmanan (Ex-TI)\, Mr. Dhirendra Rao (TI)\, Ms. Namitha P
 avan (TI) (Analog VLSI)\n\n3:00 PM – 4:00 PM (Day 2): Valedictory Ceremo
 ny &amp; Prize Distribution\n\nWinners announced: Cyberdyne Systems (Embedded)
 \, Zenon (Digital)\, The Autonomous Brain (Analog)\n\n4:00 PM\n\nVote of T
 hanks and Felicitation\n\nDayananda Sagar College of Engineering\, Shavige
  Malleshwara Hills\, 91st Main Rd\, 1st Stage\, Kumaraswamy Layout\, Benga
 luru\, Karnataka\, India\, 560111
LOCATION:Dayananda Sagar College of Engineering\, Shavige Malleshwara Hills
 \, 91st Main Rd\, 1st Stage\, Kumaraswamy Layout\, Bengaluru\, Karnataka\,
  India\, 560111
ORGANIZER:avamsikrishna@ieee.org
SEQUENCE:12
SUMMARY:ChipVerse’26 – 24 Hour VLSI &amp; Embedded Systems Hackathon
URL;VALUE=URI:https://events.vtools.ieee.org/m/544282
X-ALT-DESC:Description: &lt;br /&gt;&lt;p class=&quot;MsoNormal&quot; style=&quot;text-align: justi
 fy\; line-height: 115%\; margin: 12.0pt 0cm 12.0pt 0cm\;&quot;&gt;&lt;span lang=&quot;EN-U
 S&quot; style=&quot;font-size: 12.0pt\; line-height: 115%\; font-family: &#39;Book Antiq
 ua&#39;\,serif\; mso-bidi-font-family: &#39;Times New Roman&#39;\; mso-ansi-language: 
 EN-US\;&quot;&gt;ChipVerse&#39;26 was a two-day hackathon held on 14th &amp;amp\; 15th Mar
 ch 2026\, organized by The Point Seven Club in association with the IEEE C
 EDA DSCE Student Chapter. The event aimed to bridge the gap between theore
 tical knowledge and real-world application by testing students&#39; practical 
 understanding of core electronics concepts\, including analytical thinking
 \, debugging techniques\, and circuit simulation proficiency.&lt;/span&gt;&lt;/p&gt;\n
 &lt;p&gt;&lt;span lang=&quot;EN-US&quot; style=&quot;font-size: 12.0pt\; line-height: 107%\; font-
 family: &#39;Book Antiqua&#39;\,serif\; mso-fareast-font-family: Calibri\; mso-bid
 i-font-family: &#39;Times New Roman&#39;\; mso-ansi-language: EN-US\; mso-fareast-
 language: EN-IN\; mso-bidi-language: AR-SA\;&quot;&gt;The competition received 141
  abstract registrations across three domains: Embedded Systems (67)\, Digi
 tal VLSI (51)\, and Analog VLSI (23). Following a rigorous abstract screen
 ing process\, eight teams per domain were shortlisted for the final hackat
 hon. Day one focused on initial prototype development and mentorship\, whe
 re participants received technical guidance from industry experts from Tex
 as Instruments\, Renesas\, and Samsung. Day two involved final evaluations
  by a distinguished judging panel\, followed by a valedictory ceremony. Wi
 nners from each domain were awarded a prize of &lt;/span&gt;&lt;span lang=&quot;EN-US&quot; s
 tyle=&quot;font-size: 12.0pt\; line-height: 107%\; font-family: &#39;Times New Roma
 n&#39;\,serif\; mso-fareast-font-family: Calibri\; mso-ansi-language: EN-US\; 
 mso-fareast-language: EN-IN\; mso-bidi-language: AR-SA\;&quot;&gt;₹&lt;/span&gt;&lt;span 
 lang=&quot;EN-US&quot; style=&quot;font-size: 12.0pt\; line-height: 107%\; font-family: &#39;
 Book Antiqua&#39;\,serif\; mso-fareast-font-family: Calibri\; mso-bidi-font-fa
 mily: &#39;Times New Roman&#39;\; mso-ansi-language: EN-US\; mso-fareast-language:
  EN-IN\; mso-bidi-language: AR-SA\;&quot;&gt;10\,000/-. The event successfully pro
 moted hands-on learning\, innovation\, and technical excellence among stud
 ents.&lt;/span&gt;&lt;/p&gt;\n&lt;table style=&quot;border-collapse: collapse\; width: 100%\;&quot;
  border=&quot;1&quot;&gt;&lt;colgroup&gt;&lt;col style=&quot;width: 33.3333%\;&quot;&gt;&lt;col style=&quot;width: 33
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 vents.vtools.ieee.org/vtools_ui/media/display/b10a5606-6ca1-4122-9c04-e089
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 207&quot;&gt;&lt;/td&gt;\n&lt;/tr&gt;\n&lt;/tbody&gt;\n&lt;/table&gt;&lt;br /&gt;&lt;br /&gt;Agenda: &lt;br /&gt;&lt;p style=&quot;l
 ine-height: 115%\;&quot;&gt;&lt;strong&gt;&lt;span lang=&quot;EN&quot;&gt;Day-1 (14.03.2026)&lt;/span&gt;&lt;/str
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 amp\; Welcome Address&lt;/span&gt;&lt;/p&gt;\n&lt;p style=&quot;line-height: 115%\;&quot;&gt;&lt;span lan
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 an&gt;&lt;/p&gt;\n&lt;p style=&quot;line-height: 115%\;&quot;&gt;&lt;strong&gt;&lt;span lang=&quot;EN&quot;&gt;10:30 AM &amp;
 ndash\; 2:30 PM: &lt;/span&gt;&lt;/strong&gt;&lt;span lang=&quot;EN&quot;&gt;Initial Prototype Develop
 ment (Day 1)&lt;/span&gt;&lt;/p&gt;\n&lt;p style=&quot;line-height: 115%\;&quot;&gt;&lt;span lang=&quot;EN&quot;&gt;Pa
 rticipants worked on domain-specific projects in allocated laboratories&lt;/s
 pan&gt;&lt;/p&gt;\n&lt;p style=&quot;line-height: 115%\;&quot;&gt;&lt;span lang=&quot;EN&quot;&gt;&amp;nbsp\;&lt;/span&gt;&lt;/p
 &gt;\n&lt;p style=&quot;line-height: 115%\;&quot;&gt;&lt;strong&gt;&lt;span lang=&quot;EN&quot;&gt;2:30 PM &amp;ndash\;
  4:00 PM: &lt;/span&gt;&lt;/strong&gt;&lt;span lang=&quot;EN&quot;&gt;Mentorship Review Session&lt;/span&gt;
 &lt;/p&gt;\n&lt;p style=&quot;line-height: 115%\;&quot;&gt;&lt;span lang=&quot;EN&quot;&gt;Mentors: Dr. Shobha K
  R\, Mr. Vishal (Embedded)\; Mr. Sumukh (Ex-Renesas)\, Mr. Parvez (TI)\, M
 rs. Rajleela (Samsung) (Digital VLSI)\; Mr. Lakshmanan (Ex-TI)\, Mr. Dhire
 ndra Rao (TI)\, Ms. Namitha Pavan (TI) (Analog VLSI)&lt;/span&gt;&lt;/p&gt;\n&lt;p style=
 &quot;line-height: 115%\;&quot;&gt;&lt;span lang=&quot;EN&quot;&gt;&amp;nbsp\;&lt;/span&gt;&lt;/p&gt;\n&lt;p style=&quot;line-h
 eight: 115%\;&quot;&gt;&lt;strong&gt;&lt;span lang=&quot;EN&quot;&gt;Day-2 (15.03.2026)&lt;/span&gt;&lt;/strong&gt;&lt;
 /p&gt;\n&lt;p style=&quot;line-height: 115%\;&quot;&gt;&lt;strong&gt;&lt;span lang=&quot;EN&quot;&gt;10:00 AM &amp;ndas
 h\; 3:00 PM: &lt;/span&gt;&lt;/strong&gt;&lt;span lang=&quot;EN&quot;&gt;Final Project Evaluation &amp;amp
 \; Judging&lt;/span&gt;&lt;/p&gt;\n&lt;p style=&quot;line-height: 115%\;&quot;&gt;&lt;span lang=&quot;EN&quot;&gt;Judg
 es: Dr. Shobha K R\, Mr. Prajwal Hegde (SL Corporations)\, Mr. Vamsi Krish
 na (Comedkares) (Embedded)\; Mr. Sumukh (Ex-Renesas)\, Mr. Parvez (TI) (Di
 gital VLSI)\; Mr. Lakshmanan (Ex-TI)\, Mr. Dhirendra Rao (TI)\, Ms. Namith
 a Pavan (TI) (Analog VLSI)&lt;/span&gt;&lt;/p&gt;\n&lt;p style=&quot;line-height: 115%\;&quot;&gt;&lt;spa
 n lang=&quot;EN&quot;&gt;&amp;nbsp\;&lt;/span&gt;&lt;/p&gt;\n&lt;p style=&quot;line-height: 115%\;&quot;&gt;&lt;strong&gt;&lt;sp
 an lang=&quot;EN&quot;&gt;3:00 PM &amp;ndash\; 4:00 PM (Day 2): &lt;/span&gt;&lt;/strong&gt;&lt;span lang=
 &quot;EN&quot;&gt;Valedictory Ceremony &amp;amp\; Prize Distribution&lt;/span&gt;&lt;/p&gt;\n&lt;p style=&quot;
 line-height: 115%\;&quot;&gt;&lt;span lang=&quot;EN&quot;&gt;Winners announced: Cyberdyne Systems 
 (Embedded)\, Zenon (Digital)\, The Autonomous Brain (Analog)&lt;/span&gt;&lt;/p&gt;\n&lt;
 p style=&quot;line-height: 115%\;&quot;&gt;&lt;span lang=&quot;EN&quot;&gt;&amp;nbsp\;&lt;/span&gt;&lt;/p&gt;\n&lt;p style
 =&quot;line-height: 115%\;&quot;&gt;&lt;strong&gt;&lt;span lang=&quot;EN&quot;&gt;4:00 PM&lt;/span&gt;&lt;/strong&gt;&lt;/p&gt;
 \n&lt;p&gt;&lt;span lang=&quot;EN&quot; style=&quot;font-size: 11.0pt\; line-height: 107%\; font-f
 amily: &#39;Calibri&#39;\,sans-serif\; mso-fareast-font-family: Calibri\; mso-ansi
 -language: EN\; mso-fareast-language: EN-IN\; mso-bidi-language: AR-SA\;&quot;&gt;
 Vote of Thanks and Felicitation&lt;/span&gt;&lt;/p&gt;
END:VEVENT
END:VCALENDAR