BEGIN:VCALENDAR VERSION:2.0 PRODID:IEEE vTools.Events//EN CALSCALE:GREGORIAN BEGIN:VTIMEZONE TZID:Europe/Prague BEGIN:DAYLIGHT DTSTART:20260329T030000 TZOFFSETFROM:+0100 TZOFFSETTO:+0200 RRULE:FREQ=YEARLY;BYDAY=-1SU;BYMONTH=3 TZNAME:CEST END:DAYLIGHT BEGIN:STANDARD DTSTART:20261025T020000 TZOFFSETFROM:+0200 TZOFFSETTO:+0100 RRULE:FREQ=YEARLY;BYDAY=-1SU;BYMONTH=10 TZNAME:CET END:STANDARD END:VTIMEZONE BEGIN:VEVENT DTSTAMP:20260410T151902Z UID:9EE76025-C65F-435B-9F9C-C7B724D4989D DTSTART;TZID=Europe/Prague:20260407T130000 DTEND;TZID=Europe/Prague:20260407T134500 DESCRIPTION:Scaling contacts remains one of the most critical challenges in nano complementary metal-oxide-semiconductor (CMOS) technology. As device dimensions shrink into the nanometer regime\, issues such as surface roug hness\, reduced contact size\, limited film thickness\, and the use of und oped substrates become increasingly significant. These factors increase co ntact resistance and introduce variability and nonlinearity in the current –voltage characteristics\, potentially limiting the benefits of further CMOS miniaturization. This talk will examine these challenges and explore potential solutions for next-generation nano CMOS technologies. In the sec ond part of this talk\, attention will shift to the emerging field of ohmi c contacts in two-dimensional (2D) materials. Key difficulties—including restricted doping levels\, limited metal selection for band alignment\, e levated Fermi-level pinning\, and the impact of van der Waals gaps—will be analyzed. Strategies for improving ohmic contact performance\, such as 2D/metal van der Waals contacts\, hybrid contact structures\, junction dop ing\, phase and bandgap engineering\, and buffer layers\, will be highligh ted. Finally\, the validity of the Schottky contact model in 2D material/h igh-k/silicon heterostructures will be critically evaluated.\n\nAbout the speaker\n\nHei Wong received his Ph.D. in Electrical and Electronic Engine ering from the University of Hong Kong. In 1989\, he joined the Department of Electronic Engineering at City University of Hong Kong\, and is curren tly a full professor of the Department. He has also held visiting professo rships at the 21st Century Centre of Excellence (COE21) for Photonics-Nano device Integration Engineering at the Tokyo Institute of Technology\, Japa n\, and at Zhejiang University\, China.\n\nDr. Wong served as the founding Chair of the IEEE ED/SSC Hong Kong Joint Chapter from 2002 to 2003. He is actively involved in international steering committees\, technical progra m committees\, and organizing committees for numerous conferences worldwid e. His editorial contributions include serving as editor or guest editor f or leading journals such as Microelectronics Reliability (Elsevier)\, IEEE Transactions on Electron Devices\, IEEE Transactions on Nanotechnology\, Nanomaterials\, Electronics\, and Materials. He is the founding Editor-in- Chief of the Semiconductors and Heterogeneous Integration journal and has also served as Regional Editor for the IEEE Electron Device Society Newsle tter. Since 2002\, he has been a Distinguished Lecturer for the IEEE Elect ron Device Society.\n\nHis research spans MOS device modelling and charact erization\, thin-film dielectric physics\, micro- and nano-fabrication tec hnology\, MOS integrated circuit design\, and solid-state sensors. Dr. Won g is the author or co-author of four books and more than 400 research pape rs. Notably\, he co-authored Guide to State-of-the-Art Electron Devices\, jointly published by Wiley and IEEE to commemorate the 60th anniversary of the IRE Electron Devices Committee and the 35th anniversary of the IEEE E lectron Devices Society. Dr. Wong has delivered numerous invited talks and keynote speeches at international conferences. Since 2019\, he has consis tently been recognized on the Stanford/Elsevier list of the World’s Top 2% Scientists\n\nSpeaker(s): Hei Wong\, \n\nRoom: T2:B2-s141k\, CTU- Fac. of Electrical Engineering.\, Dpt. of microelectronics\, Technicka 2\, Prah a 6\, Czech Republic\, Czech Republic\, 16627 LOCATION:Room: T2:B2-s141k\, CTU- Fac. of Electrical Engineering.\, Dpt. of microelectronics\, Technicka 2\, Praha 6\, Czech Republic\, Czech Republi c\, 16627 ORGANIZER:sistekj@fel.cvut.cz SEQUENCE:27 SUMMARY:Contacts in Nanoscale and Contacts for Nanomaterials URL;VALUE=URI:https://events.vtools.ieee.org/m/550842 X-ALT-DESC:Description: <br /><p>Scaling contacts remains one of the most c ritical challenges in nano complementary metal-oxide-semiconductor (CMOS) technology. As device dimensions shrink into the nanometer regime\, issues such as surface roughness\, reduced contact size\, limited film thickness \, and the use of undoped substrates become increasingly significant. Thes e factors increase contact resistance and introduce variability and nonlin earity in the current&ndash\;voltage characteristics\, potentially limitin g the benefits of further CMOS miniaturization. This talk will examine the se challenges and explore potential solutions for next-generation nano CMO S technologies. In the second part of this talk\, attention will shift to the emerging field of ohmic contacts in two-dimensional (2D) materials. Ke y difficulties&mdash\;including restricted doping levels\, limited metal s election for band alignment\, elevated Fermi-level pinning\, and the impac t of van der Waals gaps&mdash\;will be analyzed. Strategies for improving ohmic contact performance\, such as 2D/metal van der Waals contacts\, hybr id contact structures\, junction doping\, phase and bandgap engineering\, and buffer layers\, will be highlighted. Finally\, the validity of the Sch ottky contact model in 2D material/high-k/silicon heterostructures will be critically evaluated.</p>\n<p><strong>About the speaker</strong></p>\n<p> <strong>Hei Wong</strong> received his Ph.D. in Electrical and Electronic Engineering from the University of Hong Kong. In 1989\, he joined the Depa rtment of Electronic Engineering at City University of Hong Kong\, and is currently a full professor of the Department. He has also held visiting pr ofessorships at the 21st Century Centre of Excellence (COE21) for Photonic s-Nanodevice Integration Engineering at the Tokyo Institute of Technology\ , Japan\, and at Zhejiang University\, China.</p>\n<p>Dr. Wong served as t he founding Chair of the IEEE ED/SSC Hong Kong Joint Chapter from 2002 to 2003. He is actively involved in international steering committees\, techn ical program committees\, and organizing committees for numerous conferenc es worldwide. His editorial contributions include serving as editor or gue st editor for leading journals such as Microelectronics Reliability (Elsev ier)\, IEEE Transactions on Electron Devices\, IEEE Transactions on Nanote chnology\, Nanomaterials\, Electronics\, and Materials. He is the founding Editor-in-Chief of the Semiconductors and Heterogeneous Integration journ al and has also served as Regional Editor for the IEEE Electron Device Soc iety Newsletter. Since 2002\, he has been a Distinguished Lecturer for the IEEE Electron Device Society.</p>\n<p>His research spans MOS device model ling and characterization\, thin-film dielectric physics\, micro- and nano -fabrication technology\, MOS integrated circuit design\, and solid-state sensors. Dr. Wong is the author or co-author of four books and more than 4 00 research papers. Notably\, he co-authored Guide to State-of-the-Art Ele ctron Devices\, jointly published by Wiley and IEEE to commemorate the 60t h anniversary of the IRE Electron Devices Committee and the 35th anniversa ry of the IEEE Electron Devices Society. Dr. Wong has delivered numerous i nvited talks and keynote speeches at international conferences. Since 2019 \, he has consistently been recognized on the Stanford/Elsevier list of th e World&rsquo\;s Top 2% Scientists</p> END:VEVENT END:VCALENDAR