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VERSION:2.0
PRODID:IEEE vTools.Events//EN
CALSCALE:GREGORIAN
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TZID:Asia/Kolkata
BEGIN:STANDARD
DTSTART:19451014T230000
TZOFFSETFROM:+0630
TZOFFSETTO:+0530
TZNAME:IST
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BEGIN:VEVENT
DTSTAMP:20260328T030039Z
UID:7ADE0669-0011-4D08-BABA-BE57A0A104F8
DTSTART;TZID=Asia/Kolkata:20260331T200000
DTEND;TZID=Asia/Kolkata:20260331T210000
DESCRIPTION:Join the IEEE CEDA Bangalore Chapter for an insightful session 
 in our &quot;Industry Insights Series.&quot; This webinar delves into the critical t
 ransition from theoretical circuit design to physical silicon implementati
 on.\n\nOur guest speaker\, Sweta Tiwary\, Senior Manager at SanDisk\, will
  share her expertise on the complexities and best practices of Layout Desi
 gn in VLSI. Whether you are a student\, researcher\, or industry professio
 nal\, this session will provide valuable perspectives on the physical desi
 gn flow that powers modern electronics.\n\n[]\n\nSpeaker(s): Sweta Tiwary\
 n\nVirtual: https://events.vtools.ieee.org/m/551253
LOCATION:Virtual: https://events.vtools.ieee.org/m/551253
ORGANIZER:avamsikrishna@ieee.org
SEQUENCE:16
SUMMARY:IEEE CEDA Industry Insights Series: From Circuits to Silicon: Under
 standing Layout Design in VLSI
URL;VALUE=URI:https://events.vtools.ieee.org/m/551253
X-ALT-DESC:Description: &lt;br /&gt;&lt;p data-path-to-node=&quot;7&quot;&gt;Join the &lt;strong dat
 a-path-to-node=&quot;7&quot; data-index-in-node=&quot;9&quot;&gt;IEEE CEDA Bangalore Chapter&lt;/str
 ong&gt; for an insightful session in our &quot;Industry Insights Series.&quot; This web
 inar delves into the critical transition from theoretical circuit design t
 o physical silicon implementation.&lt;/p&gt;\n&lt;p data-path-to-node=&quot;8&quot;&gt;Our guest
  speaker\, &lt;strong data-path-to-node=&quot;8&quot; data-index-in-node=&quot;19&quot;&gt;Sweta Tiw
 ary&lt;/strong&gt;\, Senior Manager at SanDisk\, will share her expertise on the
  complexities and best practices of Layout Design in VLSI. Whether you are
  a student\, researcher\, or industry professional\, this session will pro
 vide valuable perspectives on the physical design flow that powers modern 
 electronics.&lt;/p&gt;\n&lt;p style=&quot;text-align: center\;&quot; data-path-to-node=&quot;8&quot;&gt;&lt;i
 mg src=&quot;https://events.vtools.ieee.org/vtools_ui/media/display/723a77e3-31
 4a-4931-86dd-3f243a419d04&quot; alt=&quot;&quot; width=&quot;703&quot; height=&quot;879&quot;&gt;&lt;/p&gt;
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