BEGIN:VCALENDAR VERSION:2.0 PRODID:IEEE vTools.Events//EN CALSCALE:GREGORIAN BEGIN:VTIMEZONE TZID:America/New_York BEGIN:DAYLIGHT DTSTART:20260308T030000 TZOFFSETFROM:-0500 TZOFFSETTO:-0400 RRULE:FREQ=YEARLY;BYDAY=2SU;BYMONTH=3 TZNAME:EDT END:DAYLIGHT BEGIN:STANDARD DTSTART:20261101T010000 TZOFFSETFROM:-0400 TZOFFSETTO:-0500 RRULE:FREQ=YEARLY;BYDAY=1SU;BYMONTH=11 TZNAME:EST END:STANDARD END:VTIMEZONE BEGIN:VEVENT DTSTAMP:20260609T140141Z UID:5F811F58-9AFD-43B3-A59B-BA7EDCAF228E DTSTART;TZID=America/New_York:20260604T180000 DTEND;TZID=America/New_York:20260604T190000 DESCRIPTION:[AI-Guided Hardware Programming for Post-Quantum Cryptosystems] \n\nSpecial Presentation by Aydin Aysu (North Carolina State U.\, USA)\n\n Hosted by the Future Networks Artificial Intelligence & Machine Learning ( AI/ML) Working Group\n\nDate/Time: Thursday\, 4 June 2026 @ 6 PM Eastern T ime (3 PM Pacific Time)\n\nTopic:\n\nAI-Guided Hardware Programming for Po st-Quantum Cryptosystems\n\nAbstract:\n\nWe explore the use of the English language with the help of large language models (LLMs) and reference soft ware as a way to automate the hardware design for post-quantum cryptograph y (PQC). To that end\, we analyze recent algorithms and their building blo cks that are being standardized by the National Institute of Standards and Technology (NIST). Our results show that\, with some effort and engineeri ng help\, LLMs can help generate functional code that is synthesizable on FPGAs with reasonably comparable area-delay results. Given the rapid enhan cement in the development of LLMs\, we argue that the future of post-quant um cryptography hardware could be entirely drawn from natural language.\n\ nSpeaker:\n\n[]\nAydin Aysu is an associate professor and University Facul ty Fellow at the Electrical and Computer Engineering Department of North C arolina State University\, where he leads HECTOR: Hardware Cybersecurity R esearch Lab. He received his Ph.D. from Virginia Tech and was a post-docto ral researcher at the University of Texas at Austin before joining NC Stat e. Dr. Aysu's interests are broadly in hardware security research and cybe rsecurity education. His hardware security research has won the NSF CAREER \, Google Research Scholar\, Bennet Faculty Fellow\, and Goodnight Innovat ion Fellow awards\, three best paper awards from DATE\, HASP\, and GLS-VLS I\, two IEEE CEDA hardware security top picks\, one IEEE Micro top picks\, and one DAC publicity paper award. He is also the president of mithrilAI\ , an early-stage start-up developing secure AI hardware.\n\nBrochure (PDF) : [Webinar-AIML-2026-06-04-Aysu-AIHWPQC-Brochure.pdf](https://drive.google .com/file/d/1jujO938gO_1kGrP_XNvjyjdu6hNWK9yW/view)\n\nCo-sponsored by: Fu ture Networks Artificial Intelligence & Machine Learning (AIML) Working Gr oup and Quantum Information Technology Working Group\n\nVirtual: https://e vents.vtools.ieee.org/m/555924 LOCATION:Virtual: https://events.vtools.ieee.org/m/555924 ORGANIZER:baw@ieee.org SEQUENCE:16 SUMMARY:AI-Guided Hardware Programming for Post-Quantum Cryptosystems URL;VALUE=URI:https://events.vtools.ieee.org/m/555924 X-ALT-DESC:Description: <br /><p class="MsoNormal" style="margin-top: .25in \;"><img src="https://events.vtools.ieee.org/vtools_ui/media/display/1bbd9 e91-0245-4fa8-b635-513ec772c845" alt="AI-Guided Hardware Programming for P ost-Quantum Cryptosystems" width="750" height="197"></p>\n<p class="MsoNor mal" style="margin-top: 12.0pt\;">Special Presentation by<strong> Aydin Ay su (North Carolina State U.\, USA)</strong></p>\n<p class="MsoNormal" styl e="margin-top: 12.0pt\;">Hosted by the Future Networks<strong> Artificial Intelligence &amp\; Machine Learning (AI/ML) Working Group</strong></p>\n< p class="MsoNormal" style="margin-top: 12.0pt\;"><strong><span style="font -size: 14.0pt\; font-family: Copperplate\; mso-fareast-font-family: PMingL iU\; mso-fareast-theme-font: minor-fareast\; mso-bidi-font-family: Arial\; mso-bidi-theme-font: minor-bidi\; mso-ansi-language: EN-US\; mso-fareast- language: ZH-TW\; mso-bidi-language: AR-SA\;">Date/Time</span></strong><sp an style="font-size: 12.0pt\; font-family: 'Calibri'\,sans-serif\; mso-asc ii-theme-font: minor-latin\; mso-fareast-font-family: PMingLiU\; mso-farea st-theme-font: minor-fareast\; mso-hansi-theme-font: minor-latin\; mso-bid i-font-family: Arial\; mso-bidi-theme-font: minor-bidi\; mso-ansi-language : EN-US\; mso-fareast-language: ZH-TW\; mso-bidi-language: AR-SA\;">: <str ong>Thursday\, 4 June 2026</strong><strong>&nbsp\;@ 6 PM Eastern Time (3 P M Pacific Time)</strong></span></p>\n<p class="MsoNormal" style="margin-to p: .25in\;"><strong><u><span style="font-size: 16.0pt\; font-family: Coppe rplate\;">Topic</span></u></strong><strong><span style="font-size: 16.0pt\ ; font-family: Copperplate\;">:</span></strong></p>\n<p class="MsoNormal"> <strong><span style="font-size: 16pt\;">AI-Guided Hardware Programming for Post-Quantum Cryptosystems</span></strong></p>\n<p class="MsoNormal" styl e="margin-top: .25in\;"><strong><u><span style="font-size: 16.0pt\; font-f amily: Copperplate\;">Abstract</span></u></strong><strong><span style="fon t-size: 16.0pt\; font-family: Copperplate\;">:</span></strong></p>\n<p>We explore the use of the English language with the help of large language mo dels (LLMs) and reference software as a way to automate the hardware desig n for post-quantum cryptography (PQC). To that end\, we analyze recent alg orithms and their building blocks that are being standardized by the Natio nal Institute of Standards and Technology (NIST). Our results show that\, with some effort and engineering help\, LLMs can help generate functional code that is synthesizable on FPGAs with reasonably comparable area-delay results. Given the rapid enhancement in the development of LLMs\, we argue that the future of post-quantum cryptography hardware could be entirely d rawn from natural language.&nbsp\;</p>\n<p><strong><span style="font-size: 16.0pt\; font-family: Copperplate\;"><u>Speaker</u>:</span></strong></p>\ n<table style="border-collapse: collapse\; width: 100%\;" border="1"><colg roup><col style="width: 17.466411%\;"><col style="width: 82.43762%\;"></co lgroup>\n<tbody>\n<tr>\n<td><img src="https://events.vtools.ieee.org/vtool s_ui/media/display/4589989d-1e99-41b4-ab42-fd1642cfab59" alt="" width="150 " height="200"></td>\n<td>\n<p><strong>Aydin&nbsp\;Aysu</strong> is an ass ociate professor and&nbsp\;University Faculty Fellow at the Electrical and Computer Engineering Department of North Carolina State University\, wher e he leads HECTOR: Hardware Cybersecurity Research Lab.&nbsp\;He received his Ph.D. from Virginia Tech and was a post-doctoral researcher at the Uni versity of Texas at Austin before joining NC State.&nbsp\;Dr.&nbsp\;Aysu's interests are broadly in hardware security research and cybersecurity edu cation.&nbsp\;His hardware security research has won the NSF CAREER\, Goog le Research Scholar\, Bennet Faculty Fellow\, and Goodnight Innovation Fel low awards\, three best paper awards from DATE\, HASP\, and GLS-VLSI\, two IEEE CEDA hardware security top picks\, one IEEE Micro top picks\, and on e DAC publicity paper award.&nbsp\;He is also the president of mithrilAI\, an early-stage start-up developing&nbsp\;secure AI hardware.</p>\n</td>\n </tr>\n</tbody>\n</table>\n<p><strong>Brochure (PDF)</strong>: <a title="A I-Guided Hardware Programming for Post-Quantum Cryptosystems" href="https: //drive.google.com/file/d/1jujO938gO_1kGrP_XNvjyjdu6hNWK9yW/view" target=" _blank" rel="noopener">Webinar-AIML-2026-06-04-Aysu-AIHWPQC-Brochure.pdf</ a></p> END:VEVENT END:VCALENDAR