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DTSTART:20260308T030000
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DTSTART:20261101T010000
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DTSTAMP:20260601T204524Z
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DTSTART;TZID=America/Los_Angeles:20260716T120000
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DESCRIPTION:[]\n\nCo-Sponsored by the Photonics Chapter\n\nAs silicon photo
 nics and co-packaged optics (CPO) technologies continue to scale for AI\, 
 cloud\, and high-bandwidth networking applications\, reliability qualifica
 tion methodologies are becoming increasingly critical. While much of the i
 ndustry focus has been on performance and integration density\, standardiz
 ed approaches for qualification\, reliability assessment and long-term ser
 vice life prediction remain an important industry challenge.\nThis webinar
  will present the motivation\, structure\, and key technical consideration
 s behind the emerging JEDEC work that Cisco has led on Silicon Photonics Q
 ualification and Reliability Requirements. The session will discuss reliab
 ility expectations and qualification strategies for silicon photonics devi
 ces\, chiplets\, integrated optical assemblies\, and heterogeneous integra
 tion approaches used in AI and datacenter applications. The webinar is int
 ended for engineers and technologists working in silicon photonics\, advan
 ced packaging\, NPO\, CPO\, datacenter infrastructure\, reliability engine
 ering\, semiconductor manufacturing\, and optical module development.\n\nS
 peaker(s): Farnood Rezaie\, \n\nVirtual: https://events.vtools.ieee.org/m/
 560599
LOCATION:Virtual: https://events.vtools.ieee.org/m/560599
ORGANIZER:p.wesling@ieee.org
SEQUENCE:18
SUMMARY:Silicon Photonics Qualification and Reliability Requirements
URL;VALUE=URI:https://events.vtools.ieee.org/m/560599
X-ALT-DESC:Description: &lt;br /&gt;&lt;p&gt;&lt;img style=&quot;float: right\;&quot; src=&quot;https://e
 vents.vtools.ieee.org/vtools_ui/media/display/524ff642-d1e9-42f6-ac7b-7d14
 145b6595&quot; alt=&quot;&quot; width=&quot;410&quot; height=&quot;205&quot;&gt;&lt;/p&gt;\n&lt;p style=&quot;text-align: cent
 er\;&quot;&gt;&lt;em&gt;&lt;span style=&quot;font-family: &#39;Aptos&#39;\,sans-serif\; color: black\;&quot;&gt;
 Co-Sponsored by the Photonics Chapter&lt;/span&gt;&lt;/em&gt;&lt;/p&gt;\n&lt;p&gt;&lt;span style=&quot;fon
 t-family: &#39;Aptos&#39;\,sans-serif\; color: black\;&quot;&gt;&amp;nbsp\; &amp;nbsp\; As silicon
  photonics and co-packaged optics (CPO) technologies continue to scale for
  AI\, cloud\, and high-bandwidth networking applications\, reliability qua
 lification methodologies are becoming increasingly critical.&lt;span style=&quot;m
 so-spacerun: yes\;&quot;&gt;&amp;nbsp\; &lt;/span&gt;While much of the industry focus has be
 en on performance and integration density\, standardized approaches for qu
 alification\, reliability assessment and long-term service life prediction
  remain an important industry challenge.&amp;nbsp\; &amp;nbsp\;&lt;br&gt;&lt;/span&gt;&lt;span st
 yle=&quot;font-family: &#39;Aptos&#39;\,sans-serif\; color: black\;&quot;&gt;&amp;nbsp\; &amp;nbsp\; Th
 is webinar will present the motivation\, structure\, and key technical con
 siderations behind the emerging JEDEC work that Cisco has led on&lt;span clas
 s=&quot;apple-converted-space&quot;&gt;&amp;nbsp\;&lt;/span&gt;&lt;em&gt;&lt;span style=&quot;font-family: &#39;Apt
 os&#39;\,sans-serif\;&quot;&gt;Silicon Photonics Qualification and Reliability Require
 ments&lt;/span&gt;&lt;/em&gt;.&lt;span style=&quot;mso-spacerun: yes\;&quot;&gt;&amp;nbsp\; &lt;/span&gt;The ses
 sion will discuss reliability expectations and qualification strategies fo
 r silicon photonics devices\, chiplets\, integrated optical assemblies\, a
 nd heterogeneous integration approaches used in AI and datacenter applicat
 ions.&lt;span style=&quot;mso-spacerun: yes\;&quot;&gt;&amp;nbsp\; &lt;/span&gt;The webinar is inten
 ded for engineers and technologists working in silicon photonics\, advance
 d packaging\, NPO\, CPO\, datacenter infrastructure\, reliability engineer
 ing\, semiconductor manufacturing\, and optical module development.&lt;/span&gt;
 &lt;/p&gt;
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