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DTSTART:20260308T030000
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DTSTART:20261101T010000
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DTSTAMP:20260622T162722Z
UID:547D05DA-59C1-4F5B-BB04-79454E8FEF94
DTSTART;TZID=America/New_York:20260625T090000
DTEND;TZID=America/New_York:20260625T100000
DESCRIPTION:IEEE Electronic Packaging Society Toronto is proud to invite yo
 u to a virtual distinguished lecture by Dr. Fernando Guarin of GlobalFound
 ries.\n\nJoin us Monday\, 25 June 2026 at 10AM (ET) 9AM(EST)\n\nAbstract\n
 ---------------------------------------------------------------\n\nUp to t
 his point in the evolution of leading-edge Silicon CMOS technologies the q
 ualification of the latest nodes has been carried out using the methods an
 d targets dictated by digital/logic applications. For RF applications digi
 tal centric methodology and metrics will no longer be applicable. We will 
 discuss the reliability impact of miniaturization and the qualification ac
 tivities driven by the need to support reliable operation for RF circuit a
 pplications. The CMOS solutions for RF applications include the introducti
 on of SOI that may introduce additional reliability considerations. The pa
 th to maintaining the advanced CMOS scaling cadence and new reliability li
 miting factors will be examined from the reliability perspective. We will 
 also review the reliability requirements for RF reliability devices and ap
 plications as we prepare to introduce technologies to serve the 5G infrast
 ructure requirements. A closer look will be given to Hot Carriers. The cha
 racterization\, models and qualification methodologies will be put in the 
 required perspective for the successful qualification and transfer of lead
 ing-edge technologies to a manufacturing environment.\n\nSpeaker(s): Dr.Fe
 rnando Guarin\, \n\nVirtual: https://events.vtools.ieee.org/m/561746
LOCATION:Virtual: https://events.vtools.ieee.org/m/561746
ORGANIZER:jiupeng.zhang@mail.utoronto.ca
SEQUENCE:22
SUMMARY:[IEEE CAS04/ED15/EP21/PHO36 EDS Distinguished Lecture] Reliability 
 Topics for the Miniaturization and Qualification of Advanced Silicon CMOS 
 Technologies
URL;VALUE=URI:https://events.vtools.ieee.org/m/561746
X-ALT-DESC:Description: &lt;br /&gt;&lt;p&gt;&lt;span style=&quot;font-size: 14pt\; font-family
 : arial\, helvetica\, sans-serif\;&quot;&gt;IEEE Electronic Packaging Society Toro
 nto is proud to invite you to a virtual distinguished lecture by Dr. Ferna
 ndo Guarin of GlobalFoundries.&lt;/span&gt;&lt;/p&gt;\n&lt;p&gt;&lt;span style=&quot;font-size: 14pt
 \; font-family: arial\, helvetica\, sans-serif\;&quot;&gt;Join us Monday\, 25 June
  2026 at &lt;s&gt;10AM (ET) &lt;/s&gt;&lt;span style=&quot;color: rgb(45\, 194\, 107)\;&quot;&gt;9AM(E
 ST)&lt;/span&gt;&lt;/span&gt;&lt;/p&gt;\n&lt;p&gt;&amp;nbsp\;&lt;/p&gt;\n&lt;p&gt;&lt;span style=&quot;font-size: 18pt\; f
 ont-family: arial\, helvetica\, sans-serif\;&quot;&gt;&lt;strong&gt;Abstract&lt;/strong&gt;&lt;/s
 pan&gt;&lt;/p&gt;\n&lt;hr&gt;\n&lt;p style=&quot;margin: 0cm\;&quot;&gt;&lt;span lang=&quot;EN-US&quot; style=&quot;color: 
 black\; font-size: 14pt\; font-family: arial\, helvetica\, sans-serif\;&quot;&gt;U
 p to this point in the evolution of leading-edge Silicon CMOS technologies
  the qualification of the latest nodes has been carried out using the meth
 ods and targets dictated by digital/logic applications.&amp;nbsp\; For RF appl
 ications digital centric methodology and metrics will no longer be applica
 ble.&amp;nbsp\; We will discuss the reliability impact of miniaturization and 
 the qualification activities driven by the need to support reliable operat
 ion for RF circuit applications. &amp;nbsp\; The CMOS solutions for RF applica
 tions include the introduction of SOI that may introduce additional reliab
 ility considerations.&amp;nbsp\; &amp;nbsp\; The path to maintaining the advanced 
 CMOS scaling cadence and new reliability limiting factors will be examined
  from the reliability perspective. We will also review the reliability req
 uirements for RF reliability devices and applications as we prepare to int
 roduce technologies to serve the 5G infrastructure requirements. A closer 
 look will be given to Hot Carriers.&amp;nbsp\; The characterization\, models a
 nd qualification methodologies will be put in the required perspective for
  the successful qualification and transfer of leading-edge technologies to
  a manufacturing environment.&amp;nbsp\;&lt;/span&gt;&lt;/p&gt;\n&lt;p style=&quot;margin: 0cm\;&quot;&gt;
 &amp;nbsp\;&lt;/p&gt;\n&lt;p style=&quot;margin: 0cm\;&quot;&gt;&lt;span lang=&quot;EN-US&quot; style=&quot;color: bla
 ck\; font-size: 12pt\; font-family: arial\, helvetica\, sans-serif\;&quot;&gt;&lt;img
  style=&quot;display: block\; margin-left: auto\; margin-right: auto\;&quot; src=&quot;ht
 tps://events.vtools.ieee.org/vtools_ui/media/display/ef06f1db-0ebc-4f6e-b9
 e6-37946662789c&quot; width=&quot;976&quot; height=&quot;549&quot;&gt;&lt;/span&gt;&lt;/p&gt;
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