BEGIN:VCALENDAR VERSION:2.0 PRODID:IEEE vTools.Events//EN CALSCALE:GREGORIAN BEGIN:VTIMEZONE TZID:America/New_York BEGIN:DAYLIGHT DTSTART:20260308T030000 TZOFFSETFROM:-0500 TZOFFSETTO:-0400 RRULE:FREQ=YEARLY;BYDAY=2SU;BYMONTH=3 TZNAME:EDT END:DAYLIGHT BEGIN:STANDARD DTSTART:20261101T010000 TZOFFSETFROM:-0400 TZOFFSETTO:-0500 RRULE:FREQ=YEARLY;BYDAY=1SU;BYMONTH=11 TZNAME:EST END:STANDARD END:VTIMEZONE BEGIN:VEVENT DTSTAMP:20260705T211732Z UID:B5ADF5CC-FC9D-4E85-9FBA-FF26F866C137 DTSTART;TZID=America/New_York:20260702T120000 DTEND;TZID=America/New_York:20260702T130000 DESCRIPTION:Session 1: July 2\, 12.00-13.00\nSession 2: July 9\, 12.00-13.0 0\nRoom: E5-4106/4128\n\nWe make a deepdive into Professor Boris Murmann ’s webinar presenting a method for CMOS Transistor Sizing using the Gm/I D approach. This lecture is tailored to undergraduate and early graduate s tudents looking to transition from classroom concepts to professional-grad e design. Our deepdive is an opportunity for deeper explanations of the co ncepts presented in the webinar and to answer questions from the audience. \n\nWhy Gm/ID?: Battery powered applications for nanometre-scale silicon c hips demand lower power consumption\, which is where traditional square-la w models for circuit design (e.g.\, from ECE240/340) fall short. Boris Mur mann explains how to leverage the Gm/ID methodology to bridge the gap betw een simple theory and complex simulation\, allowing designers to optimize for gain\, bandwidth and power with precision.\n\nAbout Circuit Insights: the International Solid-State Circuits Conference (ISSCC 2026) hosted the fifth edition of Circuit Insights on February 14\, 2026. As in the past 4 years\, this event targets 3rd- and 4th-year undergraduate students and st arting graduate students\, but is also of interest to all circuit design e ngineers. The event was held in person for an audience of 50 (by invitatio n only) at the Marriott Hotel in San Francisco. It was recorded and releas ed on the SSCS/ISSCC YouTube channel\, with supporting materials on Github .\n\nAbout IEEE Solid-State Circuits Society: with over 10\,000 members ar ound the world\, the IEEE Solid-State Circuits Society focuses on fabricat ed integrated circuit designs\, in contrast to simulated circuits and anal yzed models. The Society produces the Journal of Solid-State Circuits (JSS C)\, the most downloaded technical journal in IEEE Xplore\, and sponsors t he International Solid-State Circuits Conference (ISSCC)\, the world’s p remier circuit realization conference. The University of Waterloo is home to an SSCS Student Branch Chapter and and the K-W Section SSCS Chapter\, w hich sponsor lectures\, workshops and other events of interest to the loca l circuit design community.\n\nRoom: 4106\, Bldg: E5\, 200 University Ave\ , Waterloo\, Ontario\, Canada\, N2L 3E9 LOCATION:Room: 4106\, Bldg: E5\, 200 University Ave\, Waterloo\, Ontario\, Canada\, N2L 3E9 ORGANIZER:lzqi@uwaterloo.ca SEQUENCE:16 SUMMARY:IEEE Webinar Deepdive into “CMOS Transistor Sizing: the Gm/ID App roach” URL;VALUE=URI:https://events.vtools.ieee.org/m/566247 X-ALT-DESC:Description: <br /><p>Session 1: July 2\, 12.00-13.00<br>Session 2: July 9\, 12.00-13.00<br>Room: E5-4106/4128</p>\n<p>We make a deepdive into Professor Boris Murmann&rsquo\;s webinar presenting a method for CMOS Transistor Sizing using the Gm/ID approach. This lecture is tailored to u ndergraduate and early graduate students looking to transition from classr oom concepts to professional-grade design. Our deepdive is an opportunity for deeper explanations of the concepts presented in the webinar and to an swer questions from the audience.</p>\n<p>Why Gm/ID?: Battery powered appl ications for nanometre-scale silicon chips demand lower power consumption\ , which is where&nbsp\;traditional square-law models for circuit design (e .g.\, from ECE240/340) fall short. Boris Murmann explains how to leverage the Gm/ID methodology to bridge the gap between simple theory and complex simulation\, allowing designers to optimize for gain\, bandwidth&nbsp\;and power with precision.</p>\n<p>About Circuit Insights: the International S olid-State Circuits Conference (ISSCC 2026) hosted the fifth edition of Ci rcuit Insights on&nbsp\;February 14\, 2026. As in the past 4 years\, this event targets 3rd- and 4th-year undergraduate students and starting gradua te&nbsp\;students\, but is also of interest to all circuit design engineer s. The event was held in person for an audience of 50 (by invitation only) &nbsp\;at the Marriott Hotel in San Francisco. It was recorded and release d on the SSCS/ISSCC YouTube channel\, with supporting materials&nbsp\;on G ithub.</p>\n<p>About IEEE Solid-State Circuits Society: with over 10\,000 members around the world\, the IEEE Solid-State Circuits Society focuses o n&nbsp\;fabricated integrated circuit designs\, in contrast to simulated c ircuits and analyzed models. The Society produces the Journal of&nbsp\;Sol id-State Circuits (JSSC)\, the most downloaded technical journal in IEEE X plore\, and sponsors the International Solid-State Circuits&nbsp\;Conferen ce (ISSCC)\, the world&rsquo\;s premier circuit realization conference. Th e University of Waterloo is home to an SSCS Student&nbsp\;Branch Chapter a nd and the K-W Section SSCS Chapter\, which sponsor lectures\, workshops a nd other events of interest to the local&nbsp\;circuit design community.</ p> END:VEVENT END:VCALENDAR