BEGIN:VCALENDAR VERSION:2.0 PRODID:IEEE vTools.Events//EN CALSCALE:GREGORIAN BEGIN:VTIMEZONE TZID:Asia/Kolkata BEGIN:STANDARD DTSTART:19451014T230000 TZOFFSETFROM:+0630 TZOFFSETTO:+0530 TZNAME:IST END:STANDARD END:VTIMEZONE BEGIN:VEVENT DTSTAMP:20260710T031801Z UID:B97DB23A-F86A-453C-A4AE-F418A515EE79 DTSTART;TZID=Asia/Kolkata:20260505T090000 DTEND;TZID=Asia/Kolkata:20260505T120000 DESCRIPTION:The Expert Talk on VLSI Fabrication Technologies was organized on 5th May 2026 at the Skill Lab\, K.S. School of Engineering and Manageme nt (KSSEM) by the Department of Electronics and Communication Engineering in association with the IEEE KSSEM Student Branch. The session was deliver ed by Dr. Jamuna S\, Professor\, Department of ECE\, Dayanand Sagar Colleg e of Engineering\, and an IEEE Senior Member.\n\nThe objective of the sess ion was to enhance students’ understanding of VLSI fabrication technolog ies and their significance in modern semiconductor and electronics industr ies. The talk provided an overview of semiconductor device fabrication and integrated circuit manufacturing processes\, highlighting their role in e nabling advanced electronic systems used across communication\, computing\ , automotive\, IoT\, and AI applications.\n\nThe speaker introduced fundam ental concepts of VLSI technology\, including MOSFET operation\, integrate d circuit design\, and the evolution of semiconductor devices. The discuss ion emphasized how individual semiconductor components are integrated to f orm complex and high-performance systems\, forming the backbone of modern digital technology.\n\nA significant part of the session focused on semico nductor fabrication techniques\, where Dr. Jamuna explained the P-well\, N -well\, and Twin-Tub fabrication processes used in CMOS technology. She el aborated on the advantages and applications of each process and their impo rtance in achieving optimized device performance and circuit reliability. To provide students with practical exposure to the manufacturing process\, she also presented an informative video demonstrating wafer manufacturing and semiconductor fabrication\, helping participants visualize the variou s stages involved in chip production.\n\nThe session further covered semic onductor fabrication processes\, including the importance of cleanroom env ironments\, precision engineering\, process control\, and quality assuranc e in chip manufacturing. Recent advancements in VLSI technologies were dis cussed along with industry trends shaping the future of semiconductor desi gn and fabrication. Students were also briefed on career opportunities in VLSI\, required technical skill sets\, and emerging research areas in the semiconductor domain.\n\nAn interactive question-and-answer session follow ed the talk\, during which students engaged with the speaker on topics rel ated to semiconductor fabrication\, industry expectations\, and career pat hways. The speaker provided detailed insights into current trends and guid ed students on academic preparation and skill development for careers in t he semiconductor industry.\n\nOverall\, the session effectively bridged th eoretical knowledge with real-world industrial applications\, offering val uable exposure to VLSI fabrication technologies and motivating students to explore careers in semiconductor engineering and chip design.\n\nSkill La b\, K. S. School of Engineering and Management (KSSEM)\, No.15\, Mallasand ra\, Off. Kanakapura Road\, Bengaluru\, Karnataka\, India\, 560109 LOCATION:Skill Lab\, K. S. School of Engineering and Management (KSSEM)\, N o.15\, Mallasandra\, Off. Kanakapura Road\, Bengaluru\, Karnataka\, India\ , 560109 ORGANIZER:avamsikrishna@ieee.org SEQUENCE:6 SUMMARY:Expert Talk on VLSI Fabrication Technologies URL;VALUE=URI:https://events.vtools.ieee.org/m/567309 X-ALT-DESC:Description: <br /><p>The Expert Talk on VLSI Fabrication Techno logies was organized on 5th May 2026 at the Skill Lab\, K.S. School of Eng ineering and Management (KSSEM) by the Department of Electronics and Commu nication Engineering in association with the IEEE KSSEM Student Branch. Th e session was delivered by Dr. Jamuna S\, Professor\, Department of ECE\, Dayanand Sagar College of Engineering\, and an IEEE Senior Member.</p>\n<p ><br>The objective of the session was to enhance students&rsquo\; understa nding of VLSI fabrication technologies and their significance in modern se miconductor and electronics industries. The talk provided an overview of s emiconductor device fabrication and integrated circuit manufacturing proce sses\, highlighting their role in enabling advanced electronic systems use d across communication\, computing\, automotive\, IoT\, and AI application s.</p>\n<p>The speaker introduced fundamental concepts of VLSI technology\ , including MOSFET operation\, integrated circuit design\, and the evoluti on of semiconductor devices. The discussion emphasized how individual semi conductor components are integrated to form complex and high-performance s ystems\, forming the backbone of modern digital technology.</p>\n<p>A sign ificant part of the session focused on semiconductor fabrication technique s\, where Dr. Jamuna explained the P-well\, N-well\, and Twin-Tub fabricat ion processes used in CMOS technology. She elaborated on the advantages an d applications of each process and their importance in achieving optimized device performance and circuit reliability. To provide students with prac tical exposure to the manufacturing process\, she also presented an inform ative video demonstrating wafer manufacturing and semiconductor fabricatio n\, helping participants visualize the various stages involved in chip pro duction.</p>\n<p>The session further covered semiconductor fabrication pro cesses\, including the importance of cleanroom environments\, precision en gineering\, process control\, and quality assurance in chip manufacturing. Recent advancements in VLSI technologies were discussed along with indust ry trends shaping the future of semiconductor design and fabrication. Stud ents were also briefed on career opportunities in VLSI\, required technica l skill sets\, and emerging research areas in the semiconductor domain.</p >\n<p>An interactive question-and-answer session followed the talk\, durin g which students engaged with the speaker on topics related to semiconduct or fabrication\, industry expectations\, and career pathways. The speaker provided detailed insights into current trends and guided students on acad emic preparation and skill development for careers in the semiconductor in dustry.</p>\n<p>Overall\, the session effectively bridged theoretical know ledge with real-world industrial applications\, offering valuable exposure to VLSI fabrication technologies and motivating students to explore caree rs in semiconductor engineering and chip design.</p>\n<table style="border -collapse: collapse\; width: 100%\;" border="1"><colgroup><col style="widt h: 33.3009%\;"><col style="width: 33.3009%\;"><col style="width: 33.3009%\ ;"></colgroup>\n<tbody>\n<tr>\n<td style="text-align: center\;"><img src=" https://events.vtools.ieee.org/vtools_ui/media/display/a51005c3-e3fb-44c0- a502-bd8daa06311b" width="333" height="173"></td>\n<td style="text-align: center\;"><img src="https://events.vtools.ieee.org/vtools_ui/media/display /04a36598-efab-4a45-93f5-75ad2b63b507" width="343" height="181"></td>\n<td style="text-align: center\;"><img src="https://events.vtools.ieee.org/vto ols_ui/media/display/e8187801-3664-4fc9-a1c9-19809e0e42b5" width="182" hei ght="252"></td>\n</tr>\n</tbody>\n</table> END:VEVENT END:VCALENDAR