BEGIN:VCALENDAR VERSION:2.0 PRODID:IEEE vTools.Events//EN CALSCALE:GREGORIAN BEGIN:VTIMEZONE TZID:Asia/Kolkata BEGIN:STANDARD DTSTART:19451014T230000 TZOFFSETFROM:+0630 TZOFFSETTO:+0530 TZNAME:IST END:STANDARD END:VTIMEZONE BEGIN:VEVENT DTSTAMP:20260710T061626Z UID:704BB357-39C4-4C97-944E-CF1296CACDFE DTSTART;TZID=Asia/Kolkata:20260509T100000 DTEND;TZID=Asia/Kolkata:20260509T130000 DESCRIPTION:The IEEE CEDA DSCE Student Chapter organized a Technical Talk o n “Electronic Semiconductor Devices\, From Fundamentals to Innovation” on 9th May 2026 at the Department of Electronics and Communication Engine ering\, Dayananda Sagar College of Engineering (DSCE)\, Bengaluru. The obj ective of the workshop was to provide students with practical exposure and conceptual understanding of semiconductor devices\, their evolution\, and recent innovations in semiconductor technology.\n\nThe session was delive red by Mr. Utkarsh Garg\, Senior Staff Engineer at Samsung Semiconductor I ndia R&D\, who possesses extensive industry experience in semiconductor de vice technologies and VLSI design. The workshop began with a warm welcome to the speaker\, faculty members\, IEEE members\, and student participants . The resource person was formally introduced\, highlighting his expertise and contributions to the semiconductor industry. As a gesture of gratitud e and appreciation\, the organizing team honored the speaker with a saplin g. This symbolic gesture reflected the institution’s respect and appreci ation for the speaker’s valuable contribution towards student learning a nd professional development.\n\nDuring the workshop\, the speaker explaine d the evolution of semiconductor devices starting from vacuum tubes and BJ Ts to modern MOSFET technologies. He discussed the significance of MOSFETs in modern electronics and elaborated on important concepts such as Moore ’s Law\, Dennard Scaling\, and Koomey’s Law. The session further explo red advanced semiconductor technologies including FinFETs\, MBCFETs\, Fork sheet transistors\, and CFET technologies.The speaker also highlighted the importance of technology scaling\, energy efficiency\, and advanced trans istor architectures in modern semiconductor industries. Concepts related t o standard cell libraries\, ASIC design methodologies\, and the growing ro le of Artificial Intelligence in semiconductor design automation were disc ussed in detail.\n\nThe workshop was highly interactive\, with students ac tively participating in discussions and clarifying their doubts regarding semiconductor technologies\, VLSI design\, and industry opportunities. The session successfully bridged theoretical concepts with real-world semicon ductor applications and provided students with valuable industry-oriented insights.\n\nOverall\, the event was informative\, interactive\, and succe ssful in motivating students to explore advanced semiconductor technologie s and career opportunities in VLSI and chip design.\n\nSpeaker(s): Utkarsh Garg\n\n#101\, Seminar Hall\, Building No.01\, Heritage Block Dayananda S agar College of Engineering\, Bengaluru\, Karnataka\, India\, 560078 LOCATION:#101\, Seminar Hall\, Building No.01\, Heritage Block Dayananda Sa gar College of Engineering\, Bengaluru\, Karnataka\, India\, 560078 ORGANIZER:avamsikrishna@ieee.org SEQUENCE:8 SUMMARY:Technical Talk on “Electronic Semiconductor Devices\, From Fundam entals to Innovation” URL;VALUE=URI:https://events.vtools.ieee.org/m/567329 X-ALT-DESC:Description: <br /><p>The IEEE CEDA DSCE Student Chapter organiz ed a Technical Talk on &ldquo\;Electronic Semiconductor Devices\, From Fun damentals to Innovation&rdquo\; on 9th May 2026 at the Department of Elect ronics and Communication Engineering\, Dayananda Sagar College of Engineer ing (DSCE)\, Bengaluru. The objective of the workshop was to provide stude nts with practical exposure and conceptual understanding of semiconductor devices\, their evolution\, and recent innovations in semiconductor techno logy.</p>\n<p>The session was delivered by Mr. Utkarsh Garg\, Senior Staff Engineer at Samsung Semiconductor India R&amp\;D\, who possesses extensiv e industry experience in semiconductor device technologies and VLSI design . The workshop began with a warm welcome to the speaker\, faculty members\ , IEEE members\, and student participants. The resource person was formall y introduced\, highlighting his expertise and contributions to the semicon ductor industry. As a gesture of gratitude and appreciation\, the organizi ng team honored the speaker with a sapling. This symbolic gesture reflecte d the institution&rsquo\;s respect and appreciation for the speaker&rsquo\ ;s valuable contribution towards student learning and professional develop ment.</p>\n<p>During the workshop\, the speaker explained the evolution of semiconductor devices starting from vacuum tubes and BJTs to modern MOSFE T technologies. He discussed the significance of MOSFETs in modern electro nics and elaborated on important concepts such as Moore&rsquo\;s Law\, Den nard Scaling\, and Koomey&rsquo\;s Law. The session further explored advan ced semiconductor technologies including FinFETs\, MBCFETs\, Forksheet tra nsistors\, and CFET technologies.The speaker also highlighted the importan ce of technology scaling\, energy efficiency\, and advanced transistor arc hitectures in modern semiconductor industries. Concepts related to standar d cell libraries\, ASIC design methodologies\, and the growing role of Art ificial Intelligence in semiconductor design automation were discussed in detail.</p>\n<p>The workshop was highly interactive\, with students active ly participating in discussions and clarifying their doubts regarding semi conductor technologies\, VLSI design\, and industry opportunities. The ses sion successfully bridged theoretical concepts with real-world semiconduct or applications and provided students with valuable industry-oriented insi ghts.</p>\n<p>Overall\, the event was informative\, interactive\, and succ essful in motivating students to explore advanced semiconductor technologi es and career opportunities in VLSI and chip design.</p>\n<table style="bo rder-collapse: collapse\; width: 100%\;" border="1"><colgroup><col style=" width: 33.3009%\;"><col style="width: 33.3009%\;"><col style="width: 33.30 09%\;"></colgroup>\n<tbody>\n<tr>\n<td><img src="https://events.vtools.iee e.org/vtools_ui/media/display/8c8e9901-7879-4f5f-a01c-5be64a0e0181" width= "330" height="269"></td>\n<td><img src="https://events.vtools.ieee.org/vto ols_ui/media/display/96f5ee25-a302-48cf-94dd-c2c9c8bc6dee" width="330" hei ght="252"></td>\n<td><img src="https://events.vtools.ieee.org/vtools_ui/me dia/display/e448906b-55c4-4a70-a414-704d9833b9e9" width="330" height="239" ></td>\n</tr>\n<tr>\n<td><img src="https://events.vtools.ieee.org/vtools_u i/media/display/85697fb2-8e63-406a-81f8-f0c638f526ea" width="330" height=" 184"></td>\n<td><img src="https://events.vtools.ieee.org/vtools_ui/media/d isplay/dbc867f5-e142-4906-bcf2-41d4e2546ffb" width="404" height="214"></td >\n<td>&nbsp\;</td>\n</tr>\n</tbody>\n</table> END:VEVENT END:VCALENDAR