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DTSTAMP:20260822T001013Z
UID:AB33E0B6-D0EC-4B9B-B287-F8DC04BAE78A
DTSTART;TZID=America/New_York:20260910T120000
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DESCRIPTION:The relentless demand for multi-gigabit wireless communication 
 and high-resolution sensing drives rapid innovation in D-band (110–170 G
 Hz) systems. However\, realizing efficient and scalable active phased arra
 ys at these frequencies remains challenging due to high cost\, interconnec
 t losses\, packaging parasitics\, and heterogeneous integration constraint
 s. This talk presents a holistic\, system-level approach to low-loss D-ban
 d phased array integration that unifies circuit\, antenna\, and packaging 
 co-design. Leveraging both silicon-based (CMOS\, SiGe) and III–V integra
 ted circuits\, the approach emphasizes optimized beamformer and power ampl
 ifier architectures combined with low-cost 2D scalable\, wide-angle scanni
 ng wideband antenna arrays implemented using low-cost PCB processes. Throu
 gh electromagnetic co-optimization and advanced interconnect engineering\,
  the framework achieves significant reduction in loss and improvement in o
 verall system efficiency. Measured D-band results from prototype modules d
 emonstrate wide-angle beam steering and data transmission rates up to 100 
 Gb/s. These results confirm the feasibility of steerable\, high-capacity a
 rrays suitable for both communication and sensing platforms.\n\nSpeaker(s)
 : Dr. Kamil Yavuz Kapusuz\n\nVirtual: https://events.vtools.ieee.org/m/573
 320
LOCATION:Virtual: https://events.vtools.ieee.org/m/573320
ORGANIZER:samehelnaggar@ieee.org
SEQUENCE:156
SUMMARY:From Chip to System: A Holistic Approach to 2D Scalable Low-Loss D-
 Band Active Phased Array Realization
URL;VALUE=URI:https://events.vtools.ieee.org/m/573320
X-ALT-DESC:Description: <br /><p>The relentless demand for multi-gigabit wi
 reless communication and high-resolution sensing drives rapid innovation i
 n D-band (110&ndash\;170 GHz) systems. However\, realizing efficient and s
 calable active phased arrays at these frequencies remains challenging due 
 to high cost\, interconnect losses\, packaging parasitics\, and heterogene
 ous integration constraints. This talk presents a holistic\, system-level 
 approach to low-loss D-band phased array integration that unifies circuit\
 , antenna\, and packaging co-design. Leveraging both silicon-based (CMOS\,
  SiGe) and III&ndash\;V integrated circuits\, the approach emphasizes opti
 mized beamformer and power amplifier architectures combined with low-cost 
 2D scalable\, wide-angle scanning wideband antenna arrays implemented usin
 g low-cost PCB processes. Through electromagnetic co-optimization and adva
 nced interconnect engineering\, the framework achieves significant reducti
 on in loss and improvement in overall system efficiency. Measured D-band r
 esults from prototype modules demonstrate wide-angle beam steering and dat
 a transmission rates up to 100 Gb/s. These results confirm the feasibility
  of steerable\, high-capacity arrays suitable for both communication and s
 ensing platforms.</p>
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