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DTSTAMP:20260902T220203Z
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DTSTART;TZID=America/Denver:20260909T173000
DTEND;TZID=America/Denver:20260909T190000
DESCRIPTION:The rapid growth of AI and accelerated computing is driving unp
 recedented demands on power delivery systems\, including higher processor 
 currents\, faster load transients\, tighter voltage regulation\, and incre
 asing power density at the package and board levels. This talk focuses on 
 vertical power delivery architectures\, with particular emphasis on point-
 of-load (PoL) converters\, including emerging integrated voltage regulator
  (IVR) and Continuous-capacitive voltage regulator (C2VR) approaches.\n\nT
 he session will examine how IBCs and PoL converters can be architected and
  coordinated to efficiently deliver power from the rack and board level to
  high-current processors such as GPUs and TPUs. Different converter approa
 ches—including inductive\, resonant\, and continuous-capacitor topologie
 s—will be discussed in terms of efficiency\, power density\, transient r
 esponse\, voltage regulation\, thermal performance\, scalability\, and rel
 iability. Particular attention will be given to vertical integration of po
 wer conversion within packages\, substrates\, and near-chip environments\,
  where reduced power-delivery impedance and shorter electrical paths can e
 nable significant improvements in dynamic performance.\n\nThe webinar will
  highlight the tradeoffs between IBCs and near-load regulation\, and discu
 ss how IVR and capacitive VR technologies can complement conventional PoL 
 architectures to address the extreme current density and fast dynamic requ
 irements of next-generation AI processors. The discussion will provide a s
 ystem-level perspective on emerging vertical power delivery architectures 
 and the design considerations needed to achieve efficient\, high-density\,
  and highly responsive power delivery for future accelerated computing pla
 tforms.\n\nSpeaker(s): Kishan Joshi\n\nRoom: ECEE 1B32\, Bldg: 422 UCB\, 1
 111 Engineering Drive\, Boulder\, Colorado\, United States\, 80309
LOCATION:Room: ECEE 1B32\, Bldg: 422 UCB\, 1111 Engineering Drive\, Boulder
 \, Colorado\, United States\, 80309
ORGANIZER:bowen.yang@nlr.gov
SEQUENCE:22
SUMMARY:Vertical Power Delivery for AI Data Centers: Integrated Inductive a
 nd Capacitive Voltage Regulation and Point-of-Load Converters
URL;VALUE=URI:https://events.vtools.ieee.org/m/575002
X-ALT-DESC:Description: <br /><p data-olk-copy-source="MessageBody">The rap
 id growth of AI and accelerated computing is driving unprecedented demands
  on power delivery systems\, including higher processor currents\, faster 
 load transients\, tighter voltage regulation\, and increasing power densit
 y at the package and board levels. This talk focuses on&nbsp\;vertical pow
 er delivery architectures\, with particular emphasis on&nbsp\;point-of-loa
 d (PoL) converters\, including emerging&nbsp\;integrated voltage regulator
  (IVR)&nbsp\;and&nbsp\;Continuous-capacitive voltage regulator (C2VR)&nbsp
 \;approaches.</p>\n<p>The session will examine how IBCs and PoL converters
  can be architected and coordinated to efficiently deliver power from the 
 rack and board level to high-current processors such as GPUs and TPUs. Dif
 ferent converter approaches&mdash\;including inductive\, resonant\, and co
 ntinuous-capacitor topologies&mdash\;will be discussed in terms of efficie
 ncy\, power density\, transient response\, voltage regulation\, thermal pe
 rformance\, scalability\, and reliability. Particular attention will be gi
 ven to vertical integration of power conversion within packages\, substrat
 es\, and near-chip environments\, where reduced power-delivery impedance a
 nd shorter electrical paths can enable significant improvements in dynamic
  performance.</p>\n<p>The webinar will highlight the tradeoffs between IBC
 s and near-load regulation\, and discuss how IVR and capacitive VR technol
 ogies can complement conventional PoL architectures to address the extreme
  current density and fast dynamic requirements of next-generation AI proce
 ssors. The discussion will provide a system-level perspective on emerging 
 vertical power delivery architectures and the design considerations needed
  to achieve efficient\, high-density\, and highly responsive power deliver
 y for future accelerated computing platforms.</p>
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