2026 IEEE EPS Phoenix Section Seminar: Glass Core Substrates – Advanced Packaging Pivot driving future AI and HPC Chip Performance by Dr. Srinivas V. Pietambaram (Intel)
2026-10-01 17:30 - 19:30 (America/Phoenix) | Bldg: Macro Technology Works (MTW), 7700 S River Pkwy, Tempe, Arizona, United States, 85284
Glass Core Substrates – Advanced Packaging Pivot driving future AI and HPC Chip Performance

Srinivas V. Pietambaram, Senior Principal Engineer,

Advanced Packaging Technology Development (APTD), Intel Foundry, Intel Corporation

Abstract: With ever-increasing demand for more powerful compute and the inevitable move of the semiconductor industry into the heterogeneous era that integrates multiple “chiplets” in a package, significant improvements in signaling speed, power delivery, design rules and stability of package substrates will be imperative. Scaling of traditional organic core substrates, which has served reliably over the last two and a half decades, is running out of gas due to intrinsic limitations in dimensional stability, flatness and through-hole density. Glass Core Substrates, which Intel Foundry’s APTD organization has been researching and developing for over a decade, can allow the continuation of bump pitch scaling, design rule scaling and form factor scaling through their superior mechanical properties and large-scale integration of multiple chiplets in a package due to its tunable modulus, dimensional stability and a CTE that is closer to that of silicon. It can also enable an integrated photonic-electronic platform as electrical wiring, and optical waveguides can co-exist in the same glass substrate.

In this talk, we showcase some of the breakthrough technologies and materials innovations Intel foundry has developed to overcome the critical bottlenecks that have plagued the commercialization of glass core technology. We also present successful co-formation of both electrical TGVs and Optical waveguides in the same glass substrate exhibiting a consistent low loss light transmission across the waveguides created in the glass. These advances are significant and paving the path for successful commercialization of this technology and enabling the scalability of the packages to finer design rules, ultra large area die complexes and Hyper Large Form Factor demanded by HPC and AI applications.

Biography: Srinivas (Srini) Pietambaram is a Senior Principal Engineer in Advanced Packaging Technology Development Substrate & Wafer Assembly Organization (APTD:S&WA) of Intel Foundry, Intel Corporation. He is technical lead responsible for driving disruptive packaging technologies and innovations with a recent focus on glass core substrates and co-packaged optics. Srini is the recipient of Intel Inventor of the year in 2023, first such recognition awarded at Intel in the field of packaging for his breakthrough innovations in substrates and pivotal work in developing glass core substrates. He has multiple conference presentations, invited talks and is a member of the ECTC Interconnects Committee. He received his Ph.D. in Materials Science & Engineering from University of Florida in 2001 and worked with Motorola Labs for 10 years before joining Intel in 2011. Outside of work, Srini likes to spend time and travel with his family and enjoys listening to Indian Carnatic Music. He is also an avid sports fan with a special liking to Cricket and Gator Football.

Location: Macro Technology Works Building Conference Room 3654 ([Google Maps](https://maps.app.goo.gl/8pmm79TXL5teH3Ux7))

Agenda:
Refreshments: 5:30-6:00pm
Seminar Talk: 6:00-7:00pm
MTW Tour: 7:00-7:30pm

Bldg: Macro Technology Works (MTW), 7700 S River Pkwy, Tempe, Arizona, United States, 85284
