BEGIN:VCALENDAR
VERSION:2.0
PRODID:IEEE vTools.Events//EN
CALSCALE:GREGORIAN
BEGIN:VTIMEZONE
TZID:America/Los_Angeles
BEGIN:DAYLIGHT
DTSTART:20270314T030000
TZOFFSETFROM:-0800
TZOFFSETTO:-0700
RRULE:FREQ=YEARLY;BYDAY=2SU;BYMONTH=3
TZNAME:PDT
END:DAYLIGHT
BEGIN:STANDARD
DTSTART:20261101T010000
TZOFFSETFROM:-0700
TZOFFSETTO:-0800
RRULE:FREQ=YEARLY;BYDAY=1SU;BYMONTH=11
TZNAME:PST
END:STANDARD
END:VTIMEZONE
BEGIN:VEVENT
DTSTAMP:20260903T205935Z
UID:30F18E6E-8F46-4A48-9E3B-1BF209AB0C5E
DTSTART;TZID=America/Los_Angeles:20261119T173000
DTEND;TZID=America/Los_Angeles:20261119T203000
DESCRIPTION:The rapid deployment of AI-optimized data centers is introducin
 g electrical load behaviors that differ significantly\nfrom traditional IT
  facilities. AI workloads exhibit high power density\, fast transient dema
 nd\, and large step changes\nin active power associated with training and 
 inference cycles\, creating new challenges for power system stability and\
 nprotection. In parallel\, the growing adoption of direct current (DC) arc
 hitectures within data centers is reshaping how\nthese loads are distribut
 ed\, controlled\, and interfaced to the grid.\n\nJoel discusses AI load ch
 aracteristics and examines DC-centric data center architectures as an enab
 ler for improved\nload management. A layered mitigation approach is presen
 ted\, spanning DC rack-level buffering and coordinated\npower control\, fa
 cility-level UPS and/or medium-voltage solid-state transformer (MVSST) for
  ramp-rate control\, and\ngrid interface functions. Grid code compliance t
 opics including load shedding\, voltage and frequency ride-through\,\nand 
 controlled post-fault active power recovery are addressed. The results sho
 w that coordinated DC architectures\nand power-electronic controls can all
 ow AI data centers to scale while maintaining grid-friendly behavior and\n
 regulatory compliance.\n\nSpeaker(s): Joel Liu\, \n\nAgenda: \nNo-host soc
 ial at 5:30pm\n\nPresentation at 6:00pm\n\nDinner at 7:00pm\n\nPresentatio
 n continues at 7:45pm\n\nAdjourn by 8:30pm\n\nZio Fraedo&#39;s\, 611 Gregory L
 ane\, Pleasant Hill\, California\, United States\, 94523
LOCATION:Zio Fraedo&#39;s\, 611 Gregory Lane\, Pleasant Hill\, California\, Uni
 ted States\, 94523
ORGANIZER:kent.liang@pge.com
SEQUENCE:21
SUMMARY:Rethinking Data Center Electrical Infrastructure: Challenges and Op
 portunities of 800VDC Power Systems
URL;VALUE=URI:https://events.vtools.ieee.org/m/575625
X-ALT-DESC:Description: &lt;br /&gt;&lt;p class=&quot;MsoNormal&quot;&gt;The rapid deployment of 
 AI-optimized data centers is introducing electrical load behaviors that di
 ffer significantly&amp;nbsp\;&lt;br&gt;from traditional IT facilities. AI workloads 
 exhibit high power density\, fast transient demand\, and large step change
 s&amp;nbsp\;&lt;br&gt;in active power associated with training and inference cycles\
 , creating new challenges for power system stability and&amp;nbsp\;&lt;br&gt;protect
 ion. In parallel\, the growing adoption of direct current (DC) architectur
 es within data centers is reshaping how&amp;nbsp\;&lt;br&gt;these loads are distribu
 ted\, controlled\, and interfaced to the grid.&amp;nbsp\;&lt;br&gt;&amp;nbsp\;&lt;br&gt;Joel d
 iscusses AI load characteristics and examines DC-centric data center archi
 tectures as an enabler for improved&amp;nbsp\;&lt;br&gt;load management. A layered m
 itigation approach is presented\, spanning DC rack-level buffering and coo
 rdinated&amp;nbsp\;&lt;br&gt;power control\, facility-level UPS and/or medium-voltag
 e solid-state transformer (MVSST) for ramp-rate control\, and&amp;nbsp\;&lt;br&gt;gr
 id interface functions. Grid code compliance topics including load sheddin
 g\, voltage and frequency ride-through\,&amp;nbsp\;&lt;br&gt;and controlled post-fau
 lt active power recovery are addressed. The results show that coordinated 
 DC architectures&amp;nbsp\;&lt;br&gt;and power-electronic controls can allow AI data
  centers to scale while maintaining grid-friendly behavior and&amp;nbsp\;&lt;br&gt;r
 egulatory compliance.&lt;/p&gt;&lt;br /&gt;&lt;br /&gt;Agenda: &lt;br /&gt;&lt;p class=&quot;MsoNormal&quot; st
 yle=&quot;margin-left: 1.0in\; text-indent: -1.0in\;&quot;&gt;&lt;span style=&quot;font-family:
  &#39;Arial&#39;\,sans-serif\;&quot;&gt;No-host social at 5:30pm&lt;/span&gt;&lt;/p&gt;\n&lt;p class=&quot;Mso
 Normal&quot; style=&quot;margin-left: 1.0in\; text-indent: -1.0in\;&quot;&gt;&lt;span style=&quot;fo
 nt-family: &#39;Arial&#39;\,sans-serif\;&quot;&gt;Presentation at 6:00pm&lt;/span&gt;&lt;/p&gt;\n&lt;p cl
 ass=&quot;MsoNormal&quot; style=&quot;margin-left: 1.0in\; text-indent: -1.0in\;&quot;&gt;&lt;span s
 tyle=&quot;font-family: &#39;Arial&#39;\,sans-serif\;&quot;&gt;Dinner at 7:00pm&lt;/span&gt;&lt;/p&gt;\n&lt;p 
 class=&quot;MsoNormal&quot; style=&quot;margin-left: 1.0in\; text-indent: -1.0in\;&quot;&gt;&lt;span
  style=&quot;font-family: &#39;Arial&#39;\,sans-serif\;&quot;&gt;Presentation continues at 7:45
 pm&lt;/span&gt;&lt;/p&gt;\n&lt;p class=&quot;MsoNormal&quot; style=&quot;margin-left: 1.0in\; text-inden
 t: -1.0in\;&quot;&gt;&lt;span style=&quot;font-family: &#39;Arial&#39;\,sans-serif\;&quot;&gt;Adjourn by 8
 :30pm&lt;/span&gt;&lt;/p&gt;
END:VEVENT
END:VCALENDAR