BEGIN:VCALENDAR
VERSION:2.0
PRODID:IEEE vTools.Events//EN
CALSCALE:GREGORIAN
BEGIN:VTIMEZONE
TZID:Asia/Kolkata
BEGIN:STANDARD
DTSTART:19451014T230000
TZOFFSETFROM:+0630
TZOFFSETTO:+0530
TZNAME:IST
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BEGIN:VEVENT
DTSTAMP:20260926T094407Z
UID:A07EDF62-B652-42FD-BF22-EAD11E274B76
DTSTART;TZID=Asia/Kolkata:20260901T134000
DTEND;TZID=Asia/Kolkata:20260901T154000
DESCRIPTION:Department of Electronics and Communication Engineering\n\n&amp; ED
  Cell are organising\n\n• WORKSHOP ON •\n\nDIGITAL VLSI DESIGN FLOW\n\
 nVLSI DESIGN AND INNOVATION\n\n[]\n\nRoom: B-304\, IIMT COLLEGE OF ENGINEE
 RING\, Greater Noida\, Uttar Pradesh\, India\, 201310
LOCATION:Room: B-304\, IIMT COLLEGE OF ENGINEERING\, Greater Noida\, Uttar 
 Pradesh\, India\, 201310
ORGANIZER:pankaj.maahi@gmail.com
SEQUENCE:13
SUMMARY:WORKSHOP ON DIGITAL VLSI DESIGN FLOW &amp; VLSI DESIGN INNOVATION
URL;VALUE=URI:https://events.vtools.ieee.org/m/576112
X-ALT-DESC:Description: &lt;br /&gt;&lt;p class=&quot;p1&quot;&gt;Department of Electronics and C
 ommunication Engineering&lt;/p&gt;\n&lt;p class=&quot;p1&quot;&gt;&amp;amp\; ED Cell are organising&lt;
 /p&gt;\n&lt;p class=&quot;p1&quot;&gt;&amp;bull\; WORKSHOP ON &amp;bull\;&lt;/p&gt;\n&lt;p class=&quot;p1&quot;&gt;DIGITAL 
 VLSI DESIGN FLOW&lt;/p&gt;\n&lt;p class=&quot;p1&quot;&gt;VLSI DESIGN AND INNOVATION&lt;/p&gt;\n&lt;p cla
 ss=&quot;p1&quot;&gt;&amp;nbsp\;&lt;/p&gt;\n&lt;p class=&quot;p1&quot;&gt;&lt;img src=&quot;https://events.vtools.ieee.or
 g/vtools_ui/media/display/b4d1e4aa-0c10-4f4d-ac8a-0c0d8cf38f76&quot; alt=&quot;&quot; wid
 th=&quot;511&quot; height=&quot;510&quot;&gt;&lt;/p&gt;
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