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DTSTART:20260329T030000
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DTSTAMP:20260908T102752Z
UID:2523A256-BAC2-4ACF-894D-8AE06743E8E4
DTSTART;TZID=Europe/Amsterdam:20260923T123000
DTEND;TZID=Europe/Amsterdam:20260923T163000
DESCRIPTION:The relentless demand for multi-gigabit wireless communication 
 and high-resolution sensing drives rapid innovation in D-band (110–170 G
 Hz) systems. However\, realizing efficient and scalable active phased arra
 ys at these frequencies remains challenging due to high cost\, interconnec
 t losses\, packaging parasitics\, and heterogeneous integration constraint
 s. This talk presents a holistic\, system-level approach to low-loss D-ban
 d phased array integration that unifies circuit\, antenna\, and packaging 
 co-design. Leveraging both silicon-based (CMOS\, SiGe) and III–V integra
 ted circuits\, the approach emphasizes optimized beamformer and power ampl
 ifier architectures combined with low-cost 2D scalable\, wide-angle scanni
 ng wideband antenna arrays implemented using low-cost PCB processes. Throu
 gh electromagnetic co-optimization and advanced interconnect engineering\,
  the framework achieves significant reduction in loss and improvement in o
 verall system efficiency. Measured D-band results from prototype modules d
 emonstrate wide-angle beam steering and data transmission rates up to 100 
 Gb/s. These results confirm the feasibility of steerable\, high-capacity a
 rrays suitable for both communication and sensing platforms.\n\nRoom: Meke
 lweg 4\, Bldg: TU Delft Faculty of Electrical Engineering\, Mathematics & 
 Computer Science\, Mekelweg 4\, 2628 CM Delft\, Netherlands\, Delft\, Zuid
 -Holland\, Netherlands
LOCATION:Room: Mekelweg 4\, Bldg: TU Delft Faculty of Electrical Engineerin
 g\, Mathematics & Computer Science\, Mekelweg 4\, 2628 CM Delft\, Netherla
 nds\, Delft\, Zuid-Holland\, Netherlands
ORGANIZER:KamilYavuz.Kapusuz@imec.be
SEQUENCE:34
SUMMARY:From Chip to System: A Holistic Approach to 2D Scalable Low-Loss D-
 Band Active Phased Array Realization
URL;VALUE=URI:https://events.vtools.ieee.org/m/576443
X-ALT-DESC:Description: <br /><p class="MsoNormal" style="text-align: justi
 fy\;"><span lang="en-BE">The relentless demand for multi-gigabit wireless 
 communication and high-resolution sensing drives rapid innovation in D-ban
 d (110&ndash\;170 GHz) systems. However\, realizing efficient and scalable
  active phased arrays at these frequencies remains challenging due to high
  cost\, interconnect losses\, packaging parasitics\, and heterogeneous int
 egration constraints. This talk presents a holistic\, system-level approac
 h to low-loss D-band phased array integration that unifies circuit\, anten
 na\, and packaging co-design. Leveraging both silicon-based (CMOS\, SiGe) 
 and III&ndash\;V integrated circuits\, the approach emphasizes optimized b
 eamformer and power amplifier architectures combined with low-cost 2D scal
 able\, wide-angle scanning wideband antenna arrays implemented using low-c
 ost PCB processes. Through electromagnetic co-optimization and advanced in
 terconnect engineering\, the framework achieves significant reduction in l
 oss and improvement in overall system efficiency. Measured D-band results 
 from prototype modules demonstrate wide-angle beam steering and data trans
 mission rates up to 100 Gb/s. These results confirm the feasibility of ste
 erable\, high-capacity arrays suitable for both communication and sensing 
 platforms.</span></p>
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