BEGIN:VCALENDAR VERSION:2.0 PRODID:IEEE vTools.Events//EN CALSCALE:GREGORIAN BEGIN:VTIMEZONE TZID:America/Santiago BEGIN:DAYLIGHT DTSTART:20260906T010000 TZOFFSETFROM:-0400 TZOFFSETTO:-0300 RRULE:FREQ=YEARLY;BYDAY=1SU;BYMONTH=9 TZNAME:-03 END:DAYLIGHT BEGIN:STANDARD DTSTART:20270403T230000 TZOFFSETFROM:-0300 TZOFFSETTO:-0400 RRULE:FREQ=YEARLY;BYDAY=1SA;BYMONTH=4 TZNAME:-04 END:STANDARD END:VTIMEZONE BEGIN:VEVENT DTSTAMP:20260914T164959Z UID:9B4BC894-11A7-4B6C-A12A-95372A7E2CD5 DTSTART;TZID=America/Santiago:20260914T110000 DTEND;TZID=America/Santiago:20260914T123000 DESCRIPTION:The relentless demand for multi-gigabit wireless communication and high-resolution sensing drives rapid innovation in D-band (110–170 G Hz) systems. However\, realizing efficient and scalable active phased arra ys at these frequencies remains challenging due to high cost\, interconnec t losses\, packaging parasitics\, and heterogeneous integration constraint s. This talk presents a holistic\, system-level approach to low-loss D-ban d phased array integration that unifies circuit\, antenna\, and packaging co-design. Leveraging both silicon-based (CMOS\, SiGe) and III–V integra ted circuits\, the approach emphasizes optimized beamformer and power ampl ifier architectures combined with low-cost 2D scalable\, wide-angle scanni ng wideband antenna arrays implemented using low-cost PCB processes. Throu gh electromagnetic co-optimization and advanced interconnect engineering\, the framework achieves significant reduction in loss and improvement in o verall system efficiency. Measured D-band results from prototype modules d emonstrate wide-angle beam steering and data transmission rates up to 100 Gb/s. These results confirm the feasibility of steerable\, high-capacity a rrays suitable for both communication and sensing platforms.\n\nCo-sponsor ed by: IEEE Antennas and Propagation Society (AP-S) Young Professional Amb assador\n\nSpeaker(s): PhD. Kamil Yavuz Kapusuz\n\nVirtual: https://events .vtools.ieee.org/m/576591 LOCATION:Virtual: https://events.vtools.ieee.org/m/576591 ORGANIZER:sbc.aps.pucv@ieeechile.cl SEQUENCE:52 SUMMARY:From Chip to System: A Holistic Approach to 2D Scalable Low-Loss D- Band Active Phased Array Realization URL;VALUE=URI:https://events.vtools.ieee.org/m/576591 X-ALT-DESC:Description: <br /><p class="MsoNormal" style="text-align: justi fy\;">The relentless demand for multi-gigabit wireless communication and h igh-resolution sensing drives rapid innovation in D-band (110&ndash\;170 G Hz) systems. However\, realizing efficient and scalable active phased arra ys at these frequencies remains challenging due to high cost\, interconnec t losses\, packaging parasitics\, and heterogeneous integration constraint s. This talk presents a holistic\, system-level approach to low-loss D-ban d phased array integration that unifies circuit\, antenna\, and packaging co-design. Leveraging both silicon-based (CMOS\, SiGe) and III&ndash\;V in tegrated circuits\, the approach emphasizes optimized beamformer and power amplifier architectures combined with low-cost 2D scalable\, wide-angle s canning wideband antenna arrays implemented using low-cost PCB processes. Through electromagnetic co-optimization and advanced interconnect engineer ing\, the framework achieves significant reduction in loss and improvement in overall system efficiency. Measured D-band results from prototype modu les demonstrate wide-angle beam steering and data transmission rates up to 100 Gb/s. These results confirm the feasibility of steerable\, high-capac ity arrays suitable for both communication and sensing platforms.</p> END:VEVENT END:VCALENDAR